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Contents

README

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GD32E503RET6

GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

GD32E503RET6 from GigaDevice Semicon Beijing, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Power pin with default function VBAT; the datasheet gives no voltage limits for this pin in the pin table.
2 PC13-TAMPER-RTC bidirectional General-purpose I/O with default function PC13; alternate functions TAMPER-RTC and WKUP1. Electrical level is not stated in the table.
3 PC14-OSC32IN bidirectional General-purpose I/O with default function PC14; alternate function OSC32IN. Electrical level is not stated in the table.
4 PC15-OSC32OUT bidirectional General-purpose I/O with default function PC15; alternate function OSC32OUT. Electrical level is not stated in the table.
5 OSCIN input Oscillator input with default function OSCIN; can be remapped to PD0.
6 OSCOUT output Oscillator output with default function OSCOUT; can be remapped to PD1.
7 NRST bidirectional Reset pin with default function NRST.
8 PC0 bidirectional General-purpose I/O with default function PC0; alternate function ADC012_IN10.
9 PC1 bidirectional General-purpose I/O with default function PC1; alternate function ADC012_IN11.
10 PC2 bidirectional General-purpose I/O with default function PC2; alternate functions I2S1_ADD_SD (AFIO-mapped) and ADC012_IN12.
11 PC3 bidirectional General-purpose I/O with default function PC3; alternate function ADC012_IN13.
12 VSSA power_in Analog ground pin with default function VSSA.
13 VDDA power_in Analog supply pin with default function VDDA; the table gives no voltage limits.
14 PA0-WKUP0 bidirectional General-purpose I/O with default function PA0; alternate functions WKUP0, USART1_CTS, ADC012_IN0, TIMER1_CH0, TIMER1_ETI, TIMER4_CH0 and TIMER7_ETI.
15 PA1 bidirectional General-purpose I/O with default function PA1; alternate functions USART1_RTS, ADC012_IN1, TIMER4_CH1 and TIMER1_CH1.
16 PA2 bidirectional General-purpose I/O with default function PA2; alternate functions USART1_TX, TIMER4_CH2, ADC012_IN2, TIMER8_CH0 (GD32E503xE only), TIMER1_CH2, SPI0_IO2 and WKUP3.
17 PA3 bidirectional General-purpose I/O with default function PA3; alternate functions USART1_RX, TIMER4_CH3, ADC012_IN3, TIMER1_CH3, TIMER8_CH1 (GD32E503xE only) and SPI0_IO3.
18 VSS_4 power_in Ground pin with default function VSS_4.
19 VDD_4 power_in Power supply pin with default function VDD_4.
20 PA4 bidirectional General-purpose I/O with default function PA4; alternate functions SPI0_NSS, USART1_CK, DAC_OUT0 and ADC01_IN4; remap to SPI2_NSS and I2S2_WS.
21 PA5 bidirectional General-purpose I/O with default function PA5; alternate functions SPI0_SCK, ADC01_IN5 and DAC_OUT1.
22 PA6 bidirectional General-purpose I/O with default function PA6; alternate functions SPI0_MISO, TIMER7_BRKIN, ADC01_IN6, TIMER2_CH0 and TIMER12_CH0 (GD32E503xE only); remap to TIMER0_BRKIN.
23 PA7 bidirectional General-purpose I/O with default function PA7; alternate functions SPI0_MOSI, TIMER7_CH0_ON, ADC01_IN7, TIMER2_CH1 and TIMER13_CH0 (GD32E503xE only); remap to TIMER0_CH0_ON.
24 PC4 bidirectional General-purpose I/O with default function PC4; alternate function ADC01_IN14.
25 PC5 bidirectional General-purpose I/O with default function PC5; alternate functions ADC01_IN15 and WKUP4.
26 PB0 bidirectional General-purpose I/O with default function PB0; alternate functions ADC01_IN8, TIMER2_CH2 and TIMER7_CH1_ON; remap to TIMER0_CH1_ON.
27 PB1 bidirectional General-purpose I/O with default function PB1; alternate functions SHRTIMER_SCOUT (AFIO-mapped), ADC01_IN9, TIMER2_CH3 and TIMER7_CH2_ON; remap to TIMER0_CH2_ON.
28 PB2 bidirectional 5 V tolerant I/O with default function PB2 and BOOT1; alternate function SHRTIMER_SCIN (AFIO-mapped).
29 PB10 bidirectional 5 V tolerant I/O with default function PB10; alternate functions SHRTIMER_FLT2 (AFIO-mapped), I2C1_SCL and USART2_TX; remap to TIMER1_CH2.
30 PB11 bidirectional 5 V tolerant I/O with default function PB11; alternate functions SHRTIMER_FLT3 (AFIO-mapped), I2C1_SDA and USART2_RX; remap to TIMER1_CH3.
31 VSS_1 power_in Ground pin with default function VSS_1.
32 VDD_1 power_in Power supply pin with default function VDD_1.
33 PB12 bidirectional 5 V tolerant I/O with default function PB12; alternate functions SHRTIMER_ST2CH0 (AFIO-mapped), SPI1_NSS, I2S1_WS, I2C1_SMBA, USART2_CK, TIMER0_BRKIN and CAN1_RX.
34 PB13 bidirectional 5 V tolerant I/O with default function PB13; alternate functions SHRTIMER_ST2CH1 (AFIO-mapped), SPI1_SCK, I2S1_CK, USART2_CTS, TIMER0_CH0_ON, CAN1_TX and I2C1_TXFRAME.
35 PB14 bidirectional 5 V tolerant I/O with default function PB14; alternate functions SHRTIMER_ST3CH0 and I2S1_ADD_SD (AFIO-mapped), SPI1_MISO, USART2_RTS, TIMER0_CH1_ON and TIMER11_CH0 (GD32E503xE only).
36 PB15 bidirectional 5 V tolerant I/O with default function PB15; alternate functions SHRTIMER_ST3CH1 (AFIO-mapped), SPI1_MOSI, TIMER0_CH2_ON, I2S1_SD, TIMER11_CH1 (GD32E503xE only) and WKUP6.
37 PC6 bidirectional 5 V tolerant I/O with default function PC6; alternate functions SHRTIMER_EXEV9 and USART5_TX (AFIO-mapped), I2S1_MCK, TIMER7_CH0 and SDIO_D6; remap to TIMER2_CH0.
38 PC7 bidirectional 5 V tolerant I/O with default function PC7; alternate functions SHRTIMER_FLT4 and USART5_RX (AFIO-mapped), I2S2_MCK, TIMER7_CH1 and SDIO_D7; remap to TIMER2_CH1.
39 PC8 bidirectional 5 V tolerant I/O with default function PC8; alternate functions SHRTIMER_ST4CH0 and USART5_CK (AFIO-mapped), TIMER7_CH2 and SDIO_D0; remap to TIMER2_CH2.
40 PC9 bidirectional 5 V tolerant I/O with default function PC9; alternate functions SHRTIMER_ST4CH1 and I2C2_SDA (AFIO-mapped), TIMER7_CH3 and SDIO_D1; remap to TIMER2_CH3.
41 PA8 bidirectional 5 V tolerant I/O with default function PA8; alternate functions SHRTIMER_ST0CH0 and I2C2_SCL (AFIO-mapped), USART0_CK, TIMER0_CH0, CK_OUT and CTC_SYNC.
42 PA9 bidirectional 5 V tolerant I/O with default function PA9; alternate functions SHRTIMER_ST0CH1 and I2C2_SMBA (AFIO-mapped), USART0_TX and TIMER0_CH1.
43 PA10 bidirectional 5 V tolerant I/O with default function PA10; alternate functions SHRTIMER_ST1CH0 (AFIO-mapped), USART0_RX and TIMER0_CH2.
44 PA11 bidirectional 5 V tolerant I/O with default function PA11; alternate functions SHRTIMER_ST1CH1 and USART5_TX (AFIO-mapped), USART0_CTS, CAN0_RX, USBDM and TIMER0_CH3.
45 PA12 bidirectional 5 V tolerant I/O with default function PA12; alternate functions SHRTIMER_FLT0 and USART5_RX (AFIO-mapped), USART0_RTS, CAN0_TX, USBDP and TIMER0_ETI.
46 PA13 bidirectional 5 V tolerant I/O with default function JTMS/SWDIO; can be remapped to PA13.
47 VSS_2 power_in Ground pin with default function VSS_2.
48 VDD_2 power_in Power supply pin with default function VDD_2.
49 PA14 bidirectional 5 V tolerant I/O with default function JTCK/SWCLK; can be remapped to PA14.
50 PA15 bidirectional 5 V tolerant I/O with default function JTDI; alternate functions SHRTIMER_FLT1 (AFIO-mapped), SPI2_NSS and I2S2_WS; remap to TIMER1_CH0, TIMER1_ETI, PA15 and SPI0_NSS.
51 PC10 bidirectional 5 V tolerant I/O with default function PC10; alternate functions I2C2_SCL (AFIO-mapped), UART3_TX and SDIO_D2; remap to USART2_TX, SPI2_SCK and I2S2_CK.
52 PC11 bidirectional 5 V tolerant I/O with default function PC11; alternate functions SHRTIMER_EXEV1 and I2S2_ADD_SD (AFIO-mapped), UART3_RX and SDIO_D3; remap to USART2_RX and SPI2_MISO.
53 PC12 bidirectional 5 V tolerant I/O with default function PC12; alternate functions SHRTIMER_EXEV0 (AFIO-mapped), UART4_TX and SDIO_CK; remap to USART2_CK, SPI2_MOSI and I2S2_SD.
54 PD2 bidirectional 5 V tolerant I/O with default function PD2; alternate functions TIMER2_ETI, UART4_RX and SDIO_CMD.
55 PB3 bidirectional 5 V tolerant I/O with default function JTDO; alternate functions SHRTIMER_SCOUT and SHRTIMER_EXEV8 (AFIO-mapped), SPI2_SCK and I2S2_CK; remap to TIMER1_CH1, PB3, TRACESWO and SPI0_SCK.
56 PB4 bidirectional 5 V tolerant I/O with default function NJTRST; alternate functions SHRTIMER_EXEV6, I2C2_SDA and I2S2_ADD_SD (AFIO-mapped), SPI2_MISO and I2C0_TXFRAME; remap to TIMER2_CH0, PB4 and SPI0_MISO.
57 PB5 bidirectional I/O with default function PB5; alternate functions SHRTIMER_EXEV5 and I2C2_SCL (AFIO-mapped), I2C0_SMBA, SPI2_MOSI, I2S2_SD and WKUP5; remap to TIMER2_CH1, SPI0_MOSI and CAN1_RX. The table does not mark this pin as 5 V tolerant.
58 PB6 bidirectional 5 V tolerant I/O with default function PB6; alternate functions SHRTIMER_SCIN and SHRTIMER_EXEV3 (AFIO-mapped), I2C0_SCL and TIMER3_CH0; remap to USART0_TX, CAN1_TX and SPI0_IO2.
59 PB7 bidirectional 5 V tolerant I/O with default function PB7; alternate functions SHRTIMER_EXEV2 (AFIO-mapped), I2C0_SDA and TIMER3_CH1; remap to USART0_RX and SPI0_IO3.
60 BOOT0 input Boot mode input with default function BOOT0.
61 PB8 bidirectional 5 V tolerant I/O with default function PB8; alternate functions SHRTIMER_EXEV7 and I2C2_SDA (AFIO-mapped), TIMER3_CH2 and TIMER9_CH0 (GD32E503xE only); remap to I2C0_SCL and CAN0_RX.
62 PB9 bidirectional 5 V tolerant I/O with default function PB9; alternate functions SHRTIMER_EXEV4 (AFIO-mapped), TIMER3_CH3 and TIMER10_CH0 (GD32E503xE only); remap to I2C0_SDA and CAN0_TX.
63 VSS_3 power_in Ground pin with default function VSS_3.
64 VDD_3 power_in Power supply pin with default function VDD_3.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External voltage range VDD -0.3 3.6 V Referenced to VSS (printed VSS - 0.3 / VSS + 3.6) 55
External analog supply voltage VDDA -0.3 3.6 V Referenced to VSSA (printed VSSA - 0.3 / VSSA + 3.6) 55
External battery supply voltage VBAT -0.3 3.6 V Referenced to VSS (printed VSS - 0.3 / VSS + 3.6) 55
Input voltage on 5V tolerant pin VIN -0.3 V Max printed as VDD + 3.6; VIN maximum cannot exceed 6.5 V 55
Input voltage on other I/O VIN -0.3 3.6 V Referenced to VSS 55
Variations between different VDD power pins /ΔVDDx/ 50 mV 55
Variations between different ground pins /VSSX −VSS/ 50 mV 55
Maximum current for GPIO pins IIO -25 25 mA 55
Operating temperature range TA -40 85 °C 55
Storage temperature range TSTG -55 150 °C 55
Maximum junction temperature TJ 125 °C 55
Supply voltage VDD 1.71 3.3 3.6 V 55
Analog supply voltage, fADCMAX = 35 MHz VDDA 2.4 3.3 3.6 V fADCMAX = 35 MHz 55
Analog supply voltage, fADCMAX = 14 MHz VDDA 1.71 2.4 V fADCMAX = 14 MHz 55
Battery supply voltage VBAT 1.71 3.6 V 55
AHB clock frequency fHCLK 180 MHz Guaranteed by design 56
APB1 clock frequency fAPB1 90 MHz Guaranteed by design 56
APB2 clock frequency fAPB2 180 MHz Guaranteed by design 56
VDD rise time rate tVDD 0 μs/V Max printed as ∞ 56
VDD fall time rate tVDD 20 μs/V Max printed as ∞ 56
Crystal or ceramic frequency (HXTAL) fHXTAL 4 8 32 MHz 1.71 V ≤ VDD ≤ 3.6 V 68
Recommended load capacitance on OSCIN and OSCOUT CHXTAL 20 30 pF 68
Crystal or ceramic duty cycle (HXTAL) Ducy(HXTAL) 30 50 70 % 68
External clock source or oscillator frequency (HXTAL bypass) fHXTAL_ext 1 50 MHz 1.71 V ≤ VDD ≤ 3.6 V 68
External clock source or oscillator frequency (LXTAL bypass) fLXTAL_ext 32.768 1000 kHz VDD = 3.3 V 69
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -2.5 2.5 % VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 70
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -1.8 1.8 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 70
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -1 1 % VDD = VDDA = 3.3 V, TA = 25 °C 70
Low speed internal oscillator (IRC40K) frequency fIRC40K 20 40 45 kHz VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 70
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -4 5 % VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 71
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -3 3 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 71
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -2 2 % VDD = VDDA = 3.3 V, TA = 25 °C 71
PLL input clock frequency fPLLIN 2 16 MHz 71
PLL output clock frequency fPLLOUT 16 200 MHz 71
PLL VCO output clock frequency fVCO 32 400 MHz 71
PLL lock time tLOCK 300 μs 71
PLLUSB input clock frequency fPLLIN 4 25 MHz 72
Number of guaranteed program/erase cycles before failure (endurance) PECYC 10 kcycles TA = -40 °C ~ +85 °C 73
Positive reference voltage VREF+ 1.8 V Max printed as VDDA 76
ADC clock fADC 0.1 14 MHz VDDA = 1.71 V to 2.4 V 76
ADC clock fADC 0.1 35 MHz VDDA = 2.4 V to 3.6 V 76
Sampling rate, 12-bit fS 0.007 2.86 MSPS 76
Sampling rate, 10-bit fS 0.008 3.33 MSPS 76
Sampling rate, 8-bit fS 0.01 4 MSPS 76
Sampling rate, 6-bit fS 0.012 5 MSPS 76
External input impedance RAIN 37.73 kΩ See Equation 1 76
Input sampling capacitance CADC 5.5 pF No pin/pad capacitance included 76
Load resistance RLOAD 5 kΩ Resistive load with buffer ON 78
Impedance output with buffer OFF Ro 15 kΩ 78
Load capacitance CLOAD 50 pF No pin/pad capacitance included 78
Lower DAC_OUT voltage with buffer ON DAC_OUT min 0.2 V 78
Differential non-linearity error DNL -2 2 LSB DAC in 12-bit mode 78
Integral non-linearity error INL -4 4 LSB DAC in 12-bit mode 78
Offset error Offset 10 LSB DAC in 12-bit mode 78
Gain error GE 0.5 % DAC in 12-bit mode 78
Settling time Tsetting 0.5 μs CLOAD ≤ 50 pF, RLOAD ≥ 5 kΩ 78
SCK clock frequency (SPI) fSCK 22.5 MHz 79
SDIO clock frequency in data transfer mode fPP 0 48 MHz 83
USBFS operating voltage (USBD) VDD 3 3.6 V 81

CAD (KiCad official)

  • Symbol: GD32E503RET6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: gd32e503ret6-etched.step / gd32e503ret6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32e503ret6.step / gd32e503ret6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (98 pp, sha256 bc8083c4c13a41c1, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF