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GD32E503RCT6

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GigaDevice Semicon Beijing Microcontroller Units (MCUs/MPUs/SOCs), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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GD32E503RCT6

GigaDevice Semicon Beijing · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-64(10x10)

GD32E503RCT6 from GigaDevice Semicon Beijing, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup battery supply pin.
2 PC13-TAMPER-RTC bidirectional GPIO PC13 with alternate functions TAMPER-RTC and WKUP1.
3 PC14-OSC32IN bidirectional GPIO PC14 with alternate function OSC32IN (32.768 kHz oscillator input).
4 PC15-OSC32OUT bidirectional GPIO PC15 with alternate function OSC32OUT (32.768 kHz oscillator output).
5 OSCIN input Main oscillator input, remappable to PD0.
6 OSCOUT output Main oscillator output, remappable to PD1.
7 NRST bidirectional System reset pin (I/O).
8 PC0 bidirectional GPIO PC0 with alternate function ADC012_IN10.
9 PC1 bidirectional GPIO PC1 with alternate function ADC012_IN11.
10 PC2 bidirectional GPIO PC2 with alternate functions I2S1_ADD_SD and ADC012_IN12.
11 PC3 bidirectional GPIO PC3 with alternate function ADC012_IN13.
12 VSSA power_in Analog ground.
13 VDDA power_in Analog power supply.
14 PA0-WKUP0 bidirectional GPIO PA0 with WKUP0, USART1_CTS, ADC012_IN0, TIMER1_CH0, TIMER1_ETI, TIMER4_CH0, TIMER7_ETI.
15 PA1 bidirectional GPIO PA1 with USART1_RTS, ADC012_IN1, TIMER4_CH1, TIMER1_CH1.
16 PA2 bidirectional GPIO PA2 with USART1_TX, TIMER4_CH2, ADC012_IN2, TIMER8_CH0, TIMER1_CH2, SPI0_IO2, WKUP3.
17 PA3 bidirectional GPIO PA3 with USART1_RX, TIMER4_CH3, ADC012_IN3, TIMER1_CH3, TIMER8_CH1, SPI0_IO3.
18 VSS_4 power_in Ground pin VSS_4.
19 VDD_4 power_in Digital power supply pin VDD_4.
20 PA4 bidirectional GPIO PA4 with SPI0_NSS, USART1_CK, DAC_OUT0, ADC01_IN4; remap SPI2_NSS, I2S2_WS.
21 PA5 bidirectional GPIO PA5 with SPI0_SCK, ADC01_IN5, DAC_OUT1.
22 PA6 bidirectional GPIO PA6 with SPI0_MISO, TIMER7_BRKIN, ADC01_IN6, TIMER2_CH0, TIMER12_CH0; remap TIMER0_BRKIN.
23 PA7 bidirectional GPIO PA7 with SPI0_MOSI, TIMER7_CH0_ON, ADC01_IN7, TIMER2_CH1, TIMER13_CH0; remap TIMER0_CH0_ON.
24 PC4 bidirectional GPIO PC4 with alternate function ADC01_IN14.
25 PC5 bidirectional GPIO PC5 with ADC01_IN15 and WKUP4.
26 PB0 bidirectional GPIO PB0 with ADC01_IN8, TIMER2_CH2, TIMER7_CH1_ON; remap TIMER0_CH1_ON.
27 PB1 bidirectional GPIO PB1 with SHRTIMER_SCOUT, ADC01_IN9, TIMER2_CH3, TIMER7_CH2_ON; remap TIMER0_CH2_ON.
28 PB2 bidirectional 5 V tolerant GPIO PB2, also BOOT1, with SHRTIMER_SCIN.
29 PB10 bidirectional 5 V tolerant GPIO PB10 with SHRTIMER_FLT2, I2C1_SCL, USART2_TX; remap TIMER1_CH2.
30 PB11 bidirectional 5 V tolerant GPIO PB11 with SHRTIMER_FLT3, I2C1_SDA, USART2_RX; remap TIMER1_CH3.
31 VSS_1 power_in Ground pin VSS_1.
32 VDD_1 power_in Digital power supply pin VDD_1.
33 PB12 bidirectional 5 V tolerant GPIO PB12 with SHRTIMER_ST2CH0, SPI1_NSS, I2S1_WS, I2C1_SMBA, USART2_CK, TIMER0_BRKIN, CAN1_RX.
34 PB13 bidirectional 5 V tolerant GPIO PB13 with SHRTIMER_ST2CH1, SPI1_SCK, I2S1_CK, USART2_CTS, TIMER0_CH0_ON, CAN1_TX, I2C1_TXFRAME.
35 PB14 bidirectional 5 V tolerant GPIO PB14 with SHRTIMER_ST3CH0, I2S1_ADD_SD, SPI1_MISO, USART2_RTS, TIMER0_CH1_ON, TIMER11_CH0.
36 PB15 bidirectional 5 V tolerant GPIO PB15 with SHRTIMER_ST3CH1, SPI1_MOSI, TIMER0_CH2_ON, I2S1_SD, TIMER11_CH1, WKUP6.
37 PC6 bidirectional 5 V tolerant GPIO PC6 with SHRTIMER_EXEV9, USART5_TX, I2S1_MCK, TIMER7_CH0, SDIO_D6; remap TIMER2_CH0.
38 PC7 bidirectional 5 V tolerant GPIO PC7 with SHRTIMER_FLT4, USART5_RX, I2S2_MCK, TIMER7_CH1, SDIO_D7; remap TIMER2_CH1.
39 PC8 bidirectional 5 V tolerant GPIO PC8 with SHRTIMER_ST4CH0, USART5_CK, TIMER7_CH2, SDIO_D0; remap TIMER2_CH2.
40 PC9 bidirectional 5 V tolerant GPIO PC9 with SHRTIMER_ST4CH1, I2C2_SDA, TIMER7_CH3, SDIO_D1; remap TIMER2_CH3.
41 PA8 bidirectional 5 V tolerant GPIO PA8 with SHRTIMER_ST0CH0, I2C2_SCL, USART0_CK, TIMER0_CH0, CK_OUT, CTC_SYNC.
42 PA9 bidirectional 5 V tolerant GPIO PA9 with SHRTIMER_ST0CH1, I2C2_SMBA, USART0_TX, TIMER0_CH1.
43 PA10 bidirectional 5 V tolerant GPIO PA10 with SHRTIMER_ST1CH0, USART0_RX, TIMER0_CH2.
44 PA11 bidirectional 5 V tolerant GPIO PA11 with SHRTIMER_ST1CH1, USART5_TX, USART0_CTS, CAN0_RX, USBDM, TIMER0_CH3.
45 PA12 bidirectional 5 V tolerant GPIO PA12 with SHRTIMER_FLT0, USART5_RX, USART0_RTS, CAN0_TX, USBDP, TIMER0_ETI.
46 PA13 bidirectional 5 V tolerant pin, default JTMS/SWDIO, remappable to PA13.
47 VSS_2 power_in Ground pin VSS_2.
48 VDD_2 power_in Digital power supply pin VDD_2.
49 PA14 bidirectional 5 V tolerant pin, default JTCK/SWCLK, remappable to PA14.
50 PA15 bidirectional 5 V tolerant pin, default JTDI, with SHRTIMER_FLT1, SPI2_NSS, I2S2_WS; remap TIMER1_CH0, TIMER1_ETI, PA15, SPI0_NSS.
51 PC10 bidirectional 5 V tolerant GPIO PC10 with I2C2_SCL, UART3_TX, SDIO_D2; remap USART2_TX, SPI2_SCK, I2S2_CK.
52 PC11 bidirectional 5 V tolerant GPIO PC11 with SHRTIMER_EXEV1, I2S2_ADD_SD, UART3_RX, SDIO_D3; remap USART2_RX, SPI2_MISO.
53 PC12 bidirectional 5 V tolerant GPIO PC12 with SHRTIMER_EXEV0, UART4_TX, SDIO_CK; remap USART2_CK, SPI2_MOSI, I2S2_SD.
54 PD2 bidirectional 5 V tolerant GPIO PD2 with TIMER2_ETI, UART4_RX, SDIO_CMD.
55 PB3 bidirectional 5 V tolerant pin, default JTDO, with SHRTIMER_SCOUT, SHRTIMER_EXEV8, SPI2_SCK, I2S2_CK; remap TIMER1_CH1, PB3, TRACESWO, SPI0_SCK.
56 PB4 bidirectional 5 V tolerant pin, default NJTRST, with SHRTIMER_EXEV6, I2C2_SDA, I2S2_ADD_SD, SPI2_MISO, I2C0_TXFRAME; remap TIMER2_CH0, PB4, SPI0_MISO.
57 PB5 bidirectional GPIO PB5 with SHRTIMER_EXEV5, I2C2_SCL, I2C0_SMBA, SPI2_MOSI, I2S2_SD, WKUP5; remap TIMER2_CH1, SPI0_MOSI, CAN1_RX.
58 PB6 bidirectional 5 V tolerant GPIO PB6 with SHRTIMER_SCIN, SHRTIMER_EXEV3, I2C0_SCL, TIMER3_CH0; remap USART0_TX, CAN1_TX, SPI0_IO2.
59 PB7 bidirectional 5 V tolerant GPIO PB7 with SHRTIMER_EXEV2, I2C0_SDA, TIMER3_CH1; remap USART0_RX, SPI0_IO3.
60 BOOT0 input Boot mode selection input.
61 PB8 bidirectional 5 V tolerant GPIO PB8 with SHRTIMER_EXEV7, I2C2_SDA, TIMER3_CH2, SDIO_D4, TIMER9_CH0; remap I2C0_SCL, CAN0_RX.
62 PB9 bidirectional 5 V tolerant GPIO PB9 with SHRTIMER_EXEV4, TIMER3_CH3, SDIO_D5, TIMER10_CH0; remap I2C0_SDA, CAN0_TX.
63 VSS_3 power_in Ground pin VSS_3.
64 VDD_3 power_in Digital power supply pin VDD_3.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External voltage range VDD -0.3 3.6 V printed as VSS - 0.3 to VSS + 3.6 55
External analog supply voltage VDDA -0.3 3.6 V printed as VSSA - 0.3 to VSSA + 3.6 55
External battery supply voltage VBAT -0.3 3.6 V printed as VSS - 0.3 to VSS + 3.6 55
Input voltage on 5V tolerant pin VIN -0.3 V min printed VSS - 0.3; max printed VDD + 3.6, cannot exceed 6.5 V 55
Input voltage on other I/O VIN -0.3 3.6 V min printed VSS - 0.3 55
Variations between different VDD power pins /ΔVDDx/ 50 mV 55
Variations between different ground pins /VSSX −VSS/ 50 mV 55
Maximum current for GPIO pins IIO -25 25 mA printed ±25 55
Operating temperature range TA -40 85 °C 55
Storage temperature range TSTG -55 150 °C 55
Maximum junction temperature TJ 125 °C 55
Supply voltage VDD 1.71 3.3 3.6 V 55
Analog supply voltage, fADCMAX = 35 MHz VDDA 2.4 3.3 3.6 V fADCMAX = 35 MHz 55
Analog supply voltage, fADCMAX = 14 MHz VDDA 1.71 2.4 V fADCMAX = 14 MHz 55
Battery supply voltage VBAT 1.71 3.6 V 55
AHB clock frequency fHCLK 180 MHz 56
APB1 clock frequency fAPB1 90 MHz 56
APB2 clock frequency fAPB2 180 MHz 56
VDD rise time rate tVDD 0 μs/V VDD rise time rate; max printed ∞ 56
VDD fall time rate tVDD 20 μs/V VDD fall time rate; max printed ∞ 56
Crystal or ceramic frequency fHXTAL 4 8 32 MHz 1.71 V ≤ VDD ≤ 3.6 V 68
External clock source frequency (bypass) fHXTAL_ext 1 50 MHz 1.71 V ≤ VDD ≤ 3.6 V 68
LXTAL bypass external clock frequency fLXTAL_ext 32.768 1000 kHz VDD = 3.3 V 69
IRC8M accuracy, factory-trimmed ACCIRC8M -2.5 2.5 % VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 70
IRC8M accuracy, factory-trimmed ACCIRC8M -1.8 1.8 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 70
IRC8M accuracy, factory-trimmed ACCIRC8M -1 1 % VDD = VDDA = 3.3 V, TA = 25 °C 70
IRC8M duty cycle DucyIRC8M 45 50 55 % VDD = VDDA = 3.3 V 70
IRC40K frequency fIRC40K 20 40 45 kHz VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 70
IRC48M accuracy, factory-trimmed ACCIRC48M -4 5 % VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 71
IRC48M accuracy, factory-trimmed ACCIRC48M -3 3 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 71
IRC48M accuracy, factory-trimmed ACCIRC48M -2 2 % VDD = VDDA = 3.3 V, TA = 25 °C 71
PLL input clock frequency fPLLIN 2 16 MHz 71
PLL output clock frequency fPLLOUT 16 200 MHz 71
PLL VCO output clock frequency fVCO 32 400 MHz 71
Flash program/erase endurance PECYC 10 kcycles TA = -40 °C ~ +85 °C 73
Flash data retention time tRET 10 years 73
ADC operating voltage VDDA 1.71 3.3 3.6 V 76
ADC clock fADC 0.1 14 MHz VDDA = 1.71 V to 2.4 V 76
ADC clock fADC 0.1 35 MHz VDDA = 2.4 V to 3.6 V 76
External input impedance RAIN 37.73 kΩ See Equation 1 76
Input sampling switch resistance RADC 0.55 kΩ 76
Input sampling capacitance CADC 5.5 pF No pin/pad capacitance included 76
DAC operating voltage VDDA 1.8 3.3 3.6 V 78
DAC load resistance RLOAD 5 kΩ Resistive load with buffer ON 78
DAC differential non-linearity error DNL -2 2 LSB DAC in 12-bit mode; printed ±2 78
DAC integral non-linearity INL -4 4 LSB DAC in 12-bit mode; printed ±4 78
DAC offset error Offset 10 LSB DAC in 12-bit mode 78
DAC gain error GE 0.5 % DAC in 12-bit mode 78
DAC settling time Tsetting 0.5 μs CLOAD ≤ 50 pF, RLOAD ≥ 5 kΩ 78
USBD operating voltage VDD 3 3.6 V USBFS operating voltage 81
USBD static output level low VOL 0.064 0.3 V RL of 1.0 kΩ to 3.6 V 81
USBD static output level high VOH 2.8 3.3 3.6 V RL of 15 kΩ to VSS 81
SDIO clock frequency in data transfer mode fPP 0 48 MHz 83
Power on reset threshold VPOR 1.56 V 67
Power down reset threshold VPDR 1.52 V 67
Supply current (Run mode) IDD+IDDA 59.8 mA VDD = VDDA = 3.3 V, HXTAL = 25 MHz, System clock = 180 MHz, All peripherals enabled 57
Supply current (Run mode) IDD+IDDA 26.1 mA VDD = VDDA = 3.3 V, HXTAL = 25 MHz, System clock = 180 MHz, All peripherals disabled 57

CAD (KiCad official)

  • Symbol: GD32E503RCT6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: gd32e503rct6-etched.step / gd32e503rct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32e503rct6.step / gd32e503rct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (98 pp, sha256 36877193cdaf5625, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF