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GD32E230C6T6

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GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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GD32E230C6T6

GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

GD32E230C6T6 from GigaDevice Semicon Beijing, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Power supply pin (default function VDD) for the LQFP48 package; the datasheet gives no voltage limits in this table.
2 PC13-TAMPER-RTC bidirectional General-purpose I/O PC13 (default) with additional functions RTC_TAMP0, RTC_TS, RTC_OUT and WKUP1.
3 PC14-OSC32IN bidirectional General-purpose I/O PC14 (default) with additional function OSC32IN for the low-speed oscillator.
4 PC15-OSC32OUT bidirectional General-purpose I/O PC15 (default) with additional function OSC32OUT for the low-speed oscillator.
5 PF0-OSCIN bidirectional 5 V tolerant I/O PF0 (default) with alternate I2C0_SDA and additional function OSCIN.
6 PF1-OSCOUT bidirectional 5 V tolerant I/O PF1 (default) with alternate I2C0_SCL and additional function OSCOUT.
7 NRST bidirectional Reset pin (default function NRST); its electrical characteristics are in section 4.11, which is not in the provided text.
8 VSSA power_in Analog ground pin (default function VSSA).
9 VDDA power_in Analog supply pin (default function VDDA).
10 PA0-WKUP bidirectional I/O PA0 (default) with alternates USART1_CTS, CMP_OUT and additional functions ADC_IN0, CMP_IM6, RTC_TAMP1 and WKUP0.
11 PA1 bidirectional I/O PA1 (default) with alternates USART1_RTS, EVENTOUT and additional functions ADC_IN1 and CMP_IP.
12 PA2 bidirectional I/O PA2 (default) with alternate USART1_TX and additional functions ADC_IN2 and CMP_IM7.
13 PA3 bidirectional I/O PA3 (default) with alternate USART1_RX and additional function ADC_IN3.
14 PA4 bidirectional I/O PA4 (default) with alternates SPI0_NSS, I2S0_WS, USART1_CK and TIMER13_CH0 and additional functions ADC_IN4 and CMP_IM4.
15 PA5 bidirectional I/O PA5 (default) with alternates SPI0_SCK and I2S0_CK and additional functions ADC_IN5 and CMP_IM5.
16 PA6 bidirectional I/O PA6 (default) with alternates SPI0_MISO, I2S0_MCK, TIMER2_CH0, TIMER0_BRKIN, TIMER15_CH0, EVENTOUT and CMP_OUT, and additional function ADC_IN6.
17 PA7 bidirectional I/O PA7 (default) with alternates SPI0_MOSI, I2S0_SD, TIMER2_CH1, TIMER13_CH0, TIMER0_CH0_ON, TIMER16_CH0 and EVENTOUT, and additional function ADC_IN7.
18 PB0 bidirectional I/O PB0 (default) with alternates TIMER2_CH2, TIMER0_CH1_ON, USART1_RX and EVENTOUT, and additional function ADC_IN8.
19 PB1 bidirectional I/O PB1 (default) with alternates TIMER2_CH3, TIMER13_CH0 and TIMER0_CH2_ON, and additional function ADC_IN9.
20 PB2 bidirectional 5 V tolerant I/O PB2 (default) with alternate TIMER2_ETI.
21 PB10 bidirectional 5 V tolerant I/O PB10 (default); the datasheet lists no alternate functions for this pin on C6 devices.
22 PB11 bidirectional 5 V tolerant I/O PB11 (default) with alternate function EVENTOUT.
23 VSS power_in Ground pin (default function VSS).
24 VDD power_in Power supply pin (default function VDD).
25 PB12 bidirectional 5 V tolerant I/O PB12 (default) with alternates TIMER0_BRKIN and EVENTOUT.
26 PB13 bidirectional 5 V tolerant I/O PB13 (default) with alternate TIMER0_CH0_ON.
27 PB14 bidirectional 5 V tolerant I/O PB14 (default) with alternate TIMER0_CH1_ON.
28 PB15 bidirectional 5 V tolerant I/O PB15 (default) with alternate TIMER0_CH2_ON and additional functions RTC_REFIN and WKUP6.
29 PA8 bidirectional 5 V tolerant I/O PA8 (default) with alternates USART0_CK, TIMER0_CH0, CK_OUT, USART1_TX and EVENTOUT.
30 PA9 bidirectional 5 V tolerant I/O PA9 (default) with alternates USART0_TX, TIMER0_CH1, I2C0_SCL and CK_OUT.
31 PA10 bidirectional 5 V tolerant I/O PA10 (default) with alternates USART0_RX, TIMER0_CH2, TIMER16_BRKIN and I2C0_SDA.
32 PA11 bidirectional 5 V tolerant I/O PA11 (default) with alternates USART0_CTS, TIMER0_CH3, CMP_OUT, EVENTOUT, I2C0_SMBA.
33 PA12 bidirectional 5 V tolerant I/O PA12 (default) with alternates USART0_RTS, TIMER0_ETI, EVENTOUT, I2C0_TXFRAME.
34 PA13 bidirectional 5 V tolerant I/O PA13 (default) with alternates SWDIO and IFRP_OUT.
35 PF6 bidirectional 5 V tolerant I/O PF6 (default); the datasheet lists no alternate functions for this pin on C6 devices.
36 PF7 bidirectional 5 V tolerant I/O PF7 (default); the datasheet lists no alternate functions for this pin on C6 devices.
37 PA14 bidirectional 5 V tolerant I/O PA14 (default) with alternates USART1_TX and SWCLK.
38 PA15 bidirectional 5 V tolerant I/O PA15 (default) with alternates SPI0_NSS, I2S0_WS, USART1_RX and EVENTOUT.
39 PB3 bidirectional 5 V tolerant I/O PB3 (default) with alternates SPI0_SCK, I2S0_CK and EVENTOUT.
40 PB4 bidirectional 5 V tolerant I/O PB4 (default) with alternates SPI0_MISO, I2S0_MCK, TIMER2_CH0, EVENTOUT, I2C0_TXFRAME and TIMER16_BRKIN.
41 PB5 bidirectional 5 V tolerant I/O PB5 (default) with alternates SPI0_MOSI, I2S0_SD, I2C0_SMBA, TIMER15_BRKIN and TIMER2_CH1, and additional function WKUP5.
42 PB6 bidirectional 5 V tolerant I/O PB6 (default) with alternates I2C0_SCL, USART0_TX and TIMER15_CH0_ON.
43 PB7 bidirectional 5 V tolerant I/O PB7 (default) with alternates I2C0_SDA, USART0_RX and TIMER16_CH0_ON.
44 BOOT0 input Boot mode input (default function BOOT0); the boot mode section is not in the provided text.
45 PB8 bidirectional 5 V tolerant I/O PB8 (default) with alternates I2C0_SCL and TIMER15_CH0.
46 PB9 bidirectional 5 V tolerant I/O PB9 (default) with alternates I2C0_SDA, IFRP_OUT, TIMER16_CH0, EVENTOUT and I2S0_MCK.
47 VSS power_in Ground pin (default function VSS).
48 VDD power_in Power supply pin (default function VDD).

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage on other I/O VIN 4 V 43
Variations between different VDD power pins /ΔVDDx/ 50 mV 43
Variations between different ground pins /VSSX −VSS/ 50 mV 43
Maximum current for GPIO pins IIO 25 mA 43
Injected current on 5V tolerant pin IINJ -5 5 mA Injected current on 5V tolerant pin 43
Injected current on other I/O IINJ -5 5 mA Injected current on other I/O 43
Injected current on all I/O ∑IINJ -25 25 mA Injected current on all I/O 43
Operating temperature range TA -40 85 °C 43
Storage temperature range TSTG -55 150 °C 43
Maximum junction temperature TJ 125 °C 43
Supply voltage VDD 1.8 3.3 3.6 V 43
Analog supply voltage VDDA 1.8 3.3 3.6 V ADC not used 43
Analog supply voltage VDDA 2.4 3.3 3.6 V ADC used 43
AHB clock frequency fHCLK 0 72 MHz 44
APB1 clock frequency fAPB1 0 72 MHz 44
APB2 clock frequency fAPB2 0 72 MHz 44
VDD rise time rate tVDD 0 us/V 44
VDD fall time rate 20 us/V 44
Electrostatic discharge voltage (human body model) VESD(HBM) 6000 V TA=25 °C; JESD22-A114 51
Electrostatic discharge voltage (charge device model) VESD(CDM) 2000 V TA=25 °C; JESD22-C101 51
Static latch-up I-test LU -200 200 mA TA=25 °C; JESD78 51
Vsupply over voltage 5.4 V 51
Crystal or ceramic frequency fHXTAL 4 8 32 MHz VDD=3.3V 51
Recommended matching capacitance on OSCIN and OSCOUT CHXTAL 20 30 pF 51
External clock source or oscillator frequency (HXTAL bypass) fHXTAL_ext 1 8 50 MHz VDD=3.3V 51
OSCIN high or low time tH/L(HXTAL) 5 ns 51
OSCIN rise or fall time tR/F(HXTAL) 10 ns 51
Duty cycle (HXTAL bypass) DuCy(HXTAL) 30 50 70 % 52
Recommended matching capacitance on OSC32IN and OSC32OUT CLXTAL 15 pF 52
External clock source or oscillator frequency (LXTAL bypass) fLXTAL_ext 32.768 1000 kHz VDD=3.3V 52
OSC32IN high or low time tH/L(LXTAL) 450 ns 52
OSC32IN rise or fall time tR/F(LXTAL) 50 ns 52
Duty cycle (LXTAL bypass) DuCy(LXTAL) 30 50 70 % 52
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -4 5 % VDD=3.3V, TA=-40°C ~ +105°C 53
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -2 2 % VDD=3.3V, TA=0°C ~ +85°C 53
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -1 1 % VDD=3.3V, TA=25°C 53
IRC8M oscillator operating current IDDIRC8M 55 80 μA VDD=3.3V, fIRC8M=8MHz 53
IRC28M oscillator frequency accuracy, factory-trimmed ACCIRC28M -4 5 % VDD=3.3V, TA=-40°C ~+105°C 53
IRC28M oscillator frequency accuracy, factory-trimmed ACCIRC28M -3 3 % VDD=3.3V, TA=0°C ~ +85°C 53
IRC28M oscillator frequency accuracy, factory-trimmed ACCIRC28M -2 2 % VDD=3.3V, TA=25°C 53
IRC28M oscillator operating current IDDIRC28M 140 200 μA VDD=3.3V, fIRC28M=16MHz 53
Low speed internal oscillator (IRC40K) frequency fIRC40K 30 38.5 60 KHz VDD=VDDA=3.3V, TA=-40°C ~ +85°C 53
PLL input clock frequency fPLLIN 1 25 MHz 54
PLL output clock frequency fPLLOUT 16 72 MHz 54
PLL lock time tLOCK 300 μs 54
Number of guaranteed program/erase cycles before failure (Endurance) PECYC 100 kcycles TA=-40°C ~ +85°C 54
Data retention time tRET 10 years 10k cycles at TA=85°C 54
Word programming time tPROG 37 42 us TA=-40°C ~ +85°C 54
Page erase time tERASE 0.8 1.1 ms TA=-40°C ~ +85°C 54
Mass erase time tMERASE 3.2 4 ms TA=-40°C ~ +85°C 54
Standard IO Low level input voltage VIL 0.8 V VDD=1.8V 55
Standard IO Low level input voltage VIL 1.1 V VDD=2.5V 55
Standard IO Low level input voltage VIL 1.4 V VDD=3.3V 55
Standard IO Low level input voltage VIL 1.6 V VDD=3.6V 55
Standard IO High level input voltage VIH 1.1 V VDD=1.8V 55
Standard IO High level input voltage VIH 1.5 V VDD=2.5V 55
Standard IO High level input voltage VIH 1.9 V VDD=3.3V 55
Standard IO High level input voltage VIH 2 V VDD=3.6V 55
Low level output voltage for an IO pin VOL 0.1 V VDD=3.3V, IIO=+8mA 55
High level output voltage for an IO pin VOH 3.1 V VDD=3.3V, IIO=+8mA 56

CAD (KiCad official)

  • Symbol: GD32E230C6T6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: gd32e230c6t6-etched.step / gd32e230c6t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32e230c6t6.step / gd32e230c6t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (73 pp, sha256 42f3636c1930b957, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF