component

GD32C103TBU6

Public Made by Adom

by adom

GigaDevice Semicon Beijing Pre-ordered Chips, QFN-36-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsgd32c103tbu6factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

GD32C103TBU6

GigaDevice Semicon Beijing · Pre-ordered Chips · QFN-36-EP(6x6)

GD32C103TBU6 from GigaDevice Semicon Beijing, in a QFN-36-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD_3 power_in Digital power supply pin VDD_3.
2 PD0-OSCIN input Default function OSCIN (HXTAL oscillator input), remappable to PD0, which cannot be used for EXTI in this package.
3 PD1-OSCOUT output Default function OSCOUT (HXTAL oscillator output), remappable to PD1, which cannot be used for EXTI in this package.
4 NRST bidirectional External reset pin, default function NRST.
5 VSSA power_in Analog ground pin VSSA.
6 VDDA power_in Analog power supply pin VDDA, to which VREFP is internally connected in this package.
7 PA0-WKUP bidirectional GPIO PA0 with alternates WKUP, USART1_CTS, ADC01_IN0, TIMER1_CH0, TIMER1_ETI, TIMER4_CH0.
8 PA1 bidirectional GPIO PA1 with alternates USART1_RTS, ADC01_IN1, TIMER4_CH1, TIMER1_CH1.
9 PA2 bidirectional GPIO PA2 with alternates USART1_TX, TIMER4_CH2, ADC01_IN2, TIMER1_CH2, SPI0_IO2.
10 PA3 bidirectional GPIO PA3 with alternates USART1_RX, TIMER4_CH3, ADC01_IN3, TIMER1_CH3, SPI0_IO3.
11 PA4 bidirectional GPIO PA4 with alternates SPI0_NSS, USART1_CK, DAC0_OUT0, ADC01_IN4.
12 PA5 bidirectional GPIO PA5 with alternates SPI0_SCK, ADC01_IN5, DAC0_OUT1.
13 PA6 bidirectional GPIO PA6 with alternates SPI0_MISO, ADC01_IN6, TIMER2_CH0 and remap TIMER0_BRKIN.
14 PA7 bidirectional GPIO PA7 with alternates SPI0_MOSI, ADC01_IN7, TIMER2_CH1 and remap TIMER0_CH0_ON.
15 PB0 bidirectional GPIO PB0 with alternates ADC01_IN8, TIMER2_CH2 and remap TIMER0_CH1_ON.
16 PB1 bidirectional GPIO PB1 with alternates ADC01_IN9, TIMER2_CH3 and remap TIMER0_CH2_ON.
17 PB2 bidirectional 5V-tolerant GPIO PB2, default function PB2/BOOT1.
18 VSS_1 power_in Digital ground pin VSS_1.
19 VDD_1 power_in Digital power supply pin VDD_1.
20 PA8 bidirectional 5V-tolerant GPIO PA8 with alternates USART0_CK, TIMER0_CH0, CK_OUT0, USBFS_SOF, CTC_SYNC.
21 PA9 bidirectional 5V-tolerant GPIO PA9 with alternates USART0_TX, TIMER0_CH1, USBFS_VBUS.
22 PA10 bidirectional 5V-tolerant GPIO PA10 with alternates USART0_RX, TIMER0_CH2, USBFS_ID.
23 PA11 bidirectional 5V-tolerant GPIO PA11 with alternates USART0_CTS, CAN0_RX, USBFS_DM, TIMER0_CH3.
24 PA12 bidirectional 5V-tolerant GPIO PA12 with alternates USART0_RTS, CAN0_TX, USBFS_DP, TIMER0_ETI.
25 PA13 bidirectional 5V-tolerant pin whose default function is JTMS/SWDIO, remappable to PA13.
26 VSS_2 power_in Digital ground pin VSS_2.
27 VDD_2 power_in Digital power supply pin VDD_2.
28 PA14 bidirectional 5V-tolerant pin whose default function is JTCK/SWCLK, remappable to PA14.
29 PA15 bidirectional 5V-tolerant pin whose default function is JTDI, with remaps TIMER1_CH0, TIMER1_ETI, PA15, SPI0_NSS.
30 PB3 bidirectional 5V-tolerant pin whose default function is JTDO, with remaps TIMER1_CH1, PB3, SPI0_SCK.
31 PB4 bidirectional 5V-tolerant pin whose default function is NJTRST, with alternate I2C0_TXFRAME and remaps TIMER2_CH0, PB4, SPI0_MISO.
32 PB5 bidirectional GPIO PB5 (not 5V tolerant) with alternate I2C0_SMBA and remaps TIMER2_CH1, SPI0_MOSI, CAN1_RX.
33 PB6 bidirectional 5V-tolerant GPIO PB6 with alternates I2C0_SCL, TIMER3_CH0 and remaps USART0_TX, CAN1_TX, SPI0_IO2.
34 PB7 bidirectional 5V-tolerant GPIO PB7 with alternates I2C0_SDA, TIMER3_CH1 and remaps USART0_RX, SPI0_IO3.
35 BOOT0 input Boot mode selection input, default function BOOT0.
36 VSS_3 power_in Digital ground pin VSS_3.
37 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package QFN-36-EP(6x6)
Category Interface ICs
Pins 37

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External voltage range VDD 3.6 V VSS - 0.3 to VSS + 3.6 51
External analog supply voltage VDDA 3.6 V VSSA - 0.3 to VSSA + 3.6 51
External battery supply voltage VBAT 3.6 V VSS - 0.3 to VSS + 3.6 51
Input voltage on other I/O VIN 3.6 V VSS - 0.3 min 51
Maximum current for GPIO pins IIO -25 25 mA 51
Power dissipation QFN36 PD 1086 mW TA = 85°C of QFN36 51
Storage temperature range TSTG -65 150 °C 51
Maximum junction temperature TJ 125 °C 51
Operating temperature range TA -40 85 °C 51
Supply voltage VDD 1.71 3.3 3.6 V 52
Analog supply voltage, ADC not used VDDA 1.71 3.3 3.6 V ADC not used 52
Analog supply voltage, ADC used VDDA 2.4 3.3 3.6 V ADC used 52
Battery supply voltage VBAT 1.71 3.6 V 52
AHB clock frequency fHCLK 120 MHz 52
APB1 clock frequency fAPB1 60 MHz 52
APB2 clock frequency fAPB2 120 MHz 52
Supply current (Run mode) IDD+IDDA 28.1 mA VDD = VDDA = 3.3 V, HXTAL = 25 MHz, System clock=120 MHz, All peripherals enabled 53
Supply current (Run mode) IDD+IDDA 16 mA VDD = VDDA = 3.3 V, HXTAL = 25 MHz, System clock = 120 MHz, All peripherals disabled 53
VDD fall time rate tVDD 20 μs/V 53
Power on reset threshold VPOR 1.67 V 62
Power down reset threshold VPDR 1.62 V 62
ESD voltage (HBM) VESD(HBM) 5000 V TA = 25 °C; JS-001-2014 62
ESD voltage (CDM) VESD(CDM) 800 V TA = 25 °C; JS-002-2014 62
Latch-up I-test LU -200 200 mA TA = 25 °C; JESD78 63
Crystal or ceramic frequency fHXTAL 4 8 32 MHz 1.71 ≤ VDD ≤ 3.6 V 63
IRC8M accuracy, factory-trimmed ACCIRC8M -2.5 2.5 % VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 65
IRC8M accuracy, factory-trimmed ACCIRC8M -1 1 % VDD = VDDA = 3.3 V, TA = 25 °C 65
IRC40K frequency fIRC40K 28 40 60 kHz VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 65
IRC48M accuracy, factory-trimmed ACCIRC48M -4 5 % VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 66
PLL lock time tLOCK 300 μs 66
Flash endurance PECYC 100 kcycles TA = -40 °C ~ +85 °C 67
Word programming time tPROG 37 44 μs TA = -40 °C ~ +85 °C 67
NRST input low level voltage VIL(NRST) -0.5 0.3 V 1.8 V ≤ VDD = VDDA ≤ 3.6 V; max is 0.3 VDD 67
NRST input high level voltage VIH(NRST) 0.7 0.45 V 1.8 V ≤ VDD = VDDA ≤ 3.6 V; min 0.7 VDD, max VDD + 0.45 67
Standard IO low level input voltage VIL 0.3 V 1.8 V ≤ VDD = VDDA ≤ 3.6 V; max is 0.3 VDD 68
Standard IO high level input voltage VIH 0.7 V 1.8 V ≤ VDD = VDDA ≤ 3.6 V; min is 0.7 VDD 68
Low level output voltage VOL 0.11 V IIO = +8 mA, VDD = 3.3 V 68
Low level output voltage VOL 0.28 V IIO = +20 mA, VDD = 3.3 V 68
High level output voltage VOH 3.14 V IIO = +8 mA, VDD = 3.3 V 68
High level output voltage VOH 2.91 V IIO = +20 mA, VDD = 3.3 V 68
ADC operating voltage VDDA 2.4 3.3 3.6 V 70
ADC clock fADC 0.1 42 MHz 70
ADC sampling rate 12-bit fS 0.007 3 MSPS 12-bit 70
ADC external input impedance RAIN 24 kΩ See Equation 1 70
DAC operating voltage VDDA 1.71 3.3 3.6 V 72
DAC DNL DNL 3 LSB DAC in 12-bit mode; printed ±3 72
DAC INL INL 4 LSB DAC in 12-bit mode; printed ±4 72
USBFS operating voltage VDD 3 3.6 V 78
Thermal resistance junction-to-ambient QFN36 θJA 36.82 °C/W Natural convection, 2S2P PCB, QFN36 94
Thermal resistance junction-to-board QFN36 θJB 9.79 °C/W Cold plate, 2S2P PCB, QFN36 95
Thermal resistance junction-to-case QFN36 θJC 13.31 °C/W Cold plate, 2S2P PCB, QFN36 95

CAD (KiCad official)

  • Symbol: GD32C103TBU6
  • Footprint: Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm
  • 3D model: QFN-36-EP(6x6) (KiCad packages3D, STEP)
  • 3D model files: gd32c103tbu6-etched.step / gd32c103tbu6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32c103tbu6.step / gd32c103tbu6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (99 pp, sha256 bd4df4decb53d015, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF