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GD32C103RBT6

GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

GD32C103RBT6 from GigaDevice Semicon Beijing, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup power supply pin for the RTC and backup domain, with default function VBAT.
2 PC13-TAMPER-RTC bidirectional General-purpose I/O PC13 (default) with alternate function RTC_TAMPER; the I/O level is not marked 5V tolerant in the table.
3 PC14-OSC32IN bidirectional General-purpose I/O PC14 (default) with alternate function OSC32IN for the low-speed crystal input; the I/O level is not marked 5V tolerant.
4 PC15-OSC32OUT bidirectional General-purpose I/O PC15 (default) with alternate function OSC32OUT for the low-speed crystal output; the I/O level is not marked 5V tolerant.
5 PD0-OSCIN input Default function is OSCIN (high-speed crystal input), remappable to PD0; PD0 cannot be used for EXTI in this package.
6 PD1-OSCOUT output Default function is OSCOUT (high-speed crystal output), remappable to PD1; PD1 cannot be used for EXTI in this package.
7 NRST bidirectional Reset pin with default function NRST, which is an I/O in the table.
8 PC0 bidirectional General-purpose I/O PC0 with alternate function ADC01_IN10; the I/O level is not marked 5V tolerant.
9 PC1 bidirectional General-purpose I/O PC1 with alternate function ADC01_IN11; the I/O level is not marked 5V tolerant.
10 PC2 bidirectional General-purpose I/O PC2 with alternate function ADC01_IN12; the I/O level is not marked 5V tolerant.
11 PC3 bidirectional General-purpose I/O PC3 with alternate function ADC01_IN13; the I/O level is not marked 5V tolerant.
12 VSSA power_in Analog ground for the ADC and DAC, internally connected to VREFN in this package.
13 VDDA power_in Analog supply for the ADC and DAC, internally connected to VREFP in this package.
14 PA0-WKUP bidirectional General-purpose I/O PA0 (default) with wake-up function WKUP and alternates USART1_CTS, ADC01_IN0, TIMER1_CH0, TIMER1_ETI, TIMER4_CH0, TIMER7_ETI; the I/O level is not marked 5V tolerant.
15 PA1 bidirectional General-purpose I/O PA1 with alternate functions USART1_RTS, ADC01_IN1, TIMER4_CH1, TIMER1_CH1; the I/O level is not marked 5V tolerant.
16 PA2 bidirectional General-purpose I/O PA2 with alternate functions USART1_TX, TIMER4_CH2, ADC01_IN2, TIMER8_CH0, TIMER1_CH2, SPI0_IO2; the I/O level is not marked 5V tolerant.
17 PA3 bidirectional General-purpose I/O PA3 with alternate functions USART1_RX, TIMER4_CH3, ADC01_IN3, TIMER1_CH3, TIMER8_CH1, SPI0_IO3; the I/O level is not marked 5V tolerant.
18 VSS_4 power_in Ground pin for the digital supply domain.
19 VDD_4 power_in Digital supply pin for the MCU core and I/O domain.
20 PA4 bidirectional General-purpose I/O PA4 with alternate functions SPI0_NSS, USART1_CK, DAC0_OUT0, ADC01_IN4, remappable to SPI2_NSS and I2S2_WS; the I/O level is not marked 5V tolerant.
21 PA5 bidirectional General-purpose I/O PA5 with alternate functions SPI0_SCK, ADC01_IN5, DAC0_OUT1; the I/O level is not marked 5V tolerant.
22 PA6 bidirectional General-purpose I/O PA6 with alternate functions SPI0_MISO, TIMER7_BRKIN, ADC01_IN6, TIMER2_CH0, TIMER12_CH0, remappable to TIMER0_BRKIN; the I/O level is not marked 5V tolerant.
23 PA7 bidirectional General-purpose I/O PA7 with alternate functions SPI0_MOSI, TIMER7_CH0_ON, ADC01_IN7, TIMER2_CH1, TIMER13_CH0, remappable to TIMER0_CH0_ON; the I/O level is not marked 5V tolerant.
24 PC4 bidirectional General-purpose I/O PC4 with alternate function ADC01_IN14; the I/O level is not marked 5V tolerant.
25 PC5 bidirectional General-purpose I/O PC5 with alternate function ADC01_IN15; the I/O level is not marked 5V tolerant.
26 PB0 bidirectional General-purpose I/O PB0 with alternate functions ADC01_IN8, TIMER2_CH2, TIMER7_CH1_ON, remappable to TIMER0_CH1_ON; the I/O level is not marked 5V tolerant.
27 PB1 bidirectional General-purpose I/O PB1 with alternate functions ADC01_IN9, TIMER2_CH3, TIMER7_CH2_ON, remappable to TIMER0_CH2_ON; the I/O level is not marked 5V tolerant.
28 PB2 bidirectional 5V-tolerant general-purpose I/O PB2 whose default function is also BOOT1.
29 PB10 bidirectional 5V-tolerant general-purpose I/O PB10 with alternate functions I2C1_SCL and USART2_TX, remappable to TIMER1_CH2.
30 PB11 bidirectional 5V-tolerant general-purpose I/O PB11 with alternate functions I2C1_SDA and USART2_RX, remappable to TIMER1_CH3.
31 VSS_1 power_in Ground pin for the digital supply domain.
32 VDD_1 power_in Digital supply pin for the MCU core and I/O domain.
33 PB12 bidirectional 5V-tolerant general-purpose I/O PB12 with alternate functions SPI1_NSS, I2S1_WS, I2C1_SMBA, USART2_CK, TIMER0_BRKIN, CAN1_RX.
34 PB13 bidirectional 5V-tolerant general-purpose I/O PB13 with alternate functions SPI1_SCK, I2S1_CK, USART2_CTS, TIMER0_CH0_ON, CAN1_TX, I2C1_TXFRAME.
35 PB14 bidirectional 5V-tolerant general-purpose I/O PB14 with alternate functions SPI1_MISO, USART2_RTS, TIMER0_CH1_ON, TIMER11_CH0.
36 PB15 bidirectional 5V-tolerant general-purpose I/O PB15 with alternate functions SPI1_MOSI, I2S1_SD, TIMER0_CH2_ON, TIMER11_CH1.
37 PC6 bidirectional 5V-tolerant general-purpose I/O PC6 with alternate functions I2S1_MCK and TIMER7_CH0, remappable to TIMER2_CH0.
38 PC7 bidirectional 5V-tolerant general-purpose I/O PC7 with alternate functions I2S2_MCK and TIMER7_CH1, remappable to TIMER2_CH1.
39 PC8 bidirectional 5V-tolerant general-purpose I/O PC8 with alternate function TIMER7_CH2, remappable to TIMER2_CH2.
40 PC9 bidirectional 5V-tolerant general-purpose I/O PC9 with alternate function TIMER7_CH3, remappable to TIMER2_CH3.
41 PA8 bidirectional 5V-tolerant general-purpose I/O PA8 with alternate functions USART0_CK, TIMER0_CH0, CK_OUT0, USBFS_SOF, CTC_SYNC.
42 PA9 bidirectional 5V-tolerant general-purpose I/O PA9 with alternate functions USART0_TX, TIMER0_CH1, USBFS_VBUS.
43 PA10 bidirectional 5V-tolerant general-purpose I/O PA10 with alternate functions USART0_RX, TIMER0_CH2, USBFS_ID.
44 PA11 bidirectional 5V-tolerant general-purpose I/O PA11 with alternate functions USART0_CTS, CAN0_RX, USBFS_DM, TIMER0_CH3.
45 PA12 bidirectional 5V-tolerant general-purpose I/O PA12 with alternate functions USART0_RTS, CAN0_TX, USBFS_DP, TIMER0_ETI.
46 PA13 bidirectional 5V-tolerant I/O whose default function is the JTAG/SWD pin JTMS/SWDIO, remappable to general-purpose PA13.
47 VSS_2 power_in Ground pin for the digital supply domain.
48 VDD_2 power_in Digital supply pin for the MCU core and I/O domain.
49 PA14 bidirectional 5V-tolerant I/O whose default function is the JTAG/SWD pin JTCK/SWCLK, remappable to general-purpose PA14.
50 PA15 bidirectional 5V-tolerant I/O whose default function is JTDI, with alternate functions SPI2_NSS and I2S2_WS, and remaps to TIMER1_CH0, TIMER1_ETI, PA15 and SPI0_NSS.
51 PC10 bidirectional 5V-tolerant general-purpose I/O PC10 with alternate function UART3_TX, remappable to USART2_TX, SPI2_SCK and I2S2_CK.
52 PC11 bidirectional 5V-tolerant general-purpose I/O PC11 with alternate function UART3_RX, remappable to USART2_RX and SPI2_MISO.
53 PC12 bidirectional 5V-tolerant general-purpose I/O PC12 with alternate function UART4_TX, remappable to USART2_CK, SPI2_MOSI and I2S2_SD.
54 PD2 bidirectional 5V-tolerant general-purpose I/O PD2 with alternate functions TIMER2_ETI and UART4_RX.
55 PB3 bidirectional 5V-tolerant I/O whose default function is the JTAG pin JTDO, with alternate functions SPI2_SCK and I2S2_CK, and remaps to TIMER1_CH1, PB3 and SPI0_SCK.
56 PB4 bidirectional 5V-tolerant I/O whose default function is NJTRST, with alternate functions SPI2_MISO and I2C0_TXFRAME, and remaps to TIMER2_CH0, PB4 and SPI0_MISO.
57 PB5 bidirectional General-purpose I/O PB5 with alternate functions I2C0_SMBA, SPI2_MOSI and I2S2_SD, remappable to TIMER2_CH1, SPI0_MOSI and CAN1_RX; the I/O level is not marked 5V tolerant.
58 PB6 bidirectional 5V-tolerant general-purpose I/O PB6 with alternate functions I2C0_SCL and TIMER3_CH0, remappable to USART0_TX, CAN1_TX and SPI0_IO2.
59 PB7 bidirectional 5V-tolerant general-purpose I/O PB7 with alternate functions I2C0_SDA and TIMER3_CH1, remappable to USART0_RX and SPI0_IO3.
60 BOOT0 input Boot mode selection input with default function BOOT0.
61 PB8 bidirectional 5V-tolerant general-purpose I/O PB8 with alternate functions TIMER3_CH2 and TIMER9_CH0, remappable to I2C0_SCL and CAN0_RX.
62 PB9 bidirectional 5V-tolerant general-purpose I/O PB9 with alternate functions TIMER3_CH3 and TIMER10_CH0, remappable to I2C0_SDA and CAN0_TX.
63 VSS_3 power_in Ground pin for the digital supply domain.
64 VDD_3 power_in Digital supply pin for the MCU core and I/O domain.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power supply voltage VDD (absolute, referenced to VSS) VDD -0.3 3.6 V 51
Analog supply voltage VDDA (absolute, referenced to VSSA) VDDA -0.3 3.6 V 51
Battery supply voltage VBAT (absolute, referenced to VSS) VBAT -0.3 3.6 V 51
Input voltage on 5V tolerant pin VIN -0.3 V 5V tolerant pin 51
Input voltage on other I/O VIN -0.3 3.6 V Other I/O 51
Variation between different VDD power pins /ΔVDDX/ 50 mV 51
Variation between different ground pins /VSSX-VSS/ 50 mV 51
Maximum current for GPIO pins IIO -25 25 mA 51
Operating temperature range TA -40 85 °C 51
Power dissipation of LQFP64 PD 733 mW TA = 85°C 51
Storage temperature range TSTG -65 150 °C 51
Maximum junction temperature TJ 125 °C 51
Supply voltage VDD 1.71 3.3 3.6 V 52
Analog supply voltage (ADC not used) VDDA 1.71 3.3 3.6 V ADC not used 52
Analog supply voltage (ADC used) VDDA 2.4 3.3 3.6 V ADC used 52
Battery supply voltage VBAT 1.71 3.6 V 52
AHB clock frequency fHCLK 120 MHz 52
APB1 clock frequency fAPB1 60 MHz 52
APB2 clock frequency fAPB2 120 MHz 52
VDD rise time rate tVDD 0 μs/V 53
VDD fall time rate tVDD 20 μs/V 53
Electrostatic discharge voltage (human body model) VESD(HBM) 5000 V TA = 25 °C; JS-001-2014 62
Electrostatic discharge voltage (charge device model) VESD(CDM) 800 V TA = 25 °C; JS-002-2014 62
Static latch-up I-test LU I-test -200 200 mA TA = 25 °C; JESD78 63
Static latch-up Vsupply over voltage Vsupply 5.4 V 63
Crystal or ceramic frequency (HXTAL) fHXTAL 4 8 32 MHz 1.71 ≤ VDD ≤ 3.6 V 63
Recommended matching capacitance on OSCIN and OSCOUT CHXTAL 20 30 pF 63
Crystal or ceramic duty cycle (HXTAL) Ducy(HXTAL) 30 50 70 % 63
External clock source or oscillator frequency (HXTAL bypass) fHXTAL_ext 1 50 MHz VDD = 3.3 V 63
OSCIN high or low time (HXTAL bypass) tH/L(HXTAL) 5 ns 63
OSCIN rise or fall time (HXTAL bypass) tR/F(HXTAL) 10 ns 63
Duty cycle (HXTAL bypass) Ducy(HXTAL) 40 60 % 63
Crystal or ceramic duty cycle (LXTAL) Ducy(LXTAL) 30 70 % 64
External clock source or oscillator frequency (LXTAL bypass) fLXTAL_ext 32.768 1000 kHz VDD = 3.3 V 64
OSC32IN high or low time (LXTAL bypass) tH/L(LXTAL) 450 ns 64
OSC32IN rise or fall time (LXTAL bypass) tR/F(LXTAL) 50 ns 64
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -2.5 2.5 % VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 65
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -1.8 1.8 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 65
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -1 1 % VDD = VDDA = 3.3 V, TA = 25 °C 65
IRC8M oscillator duty cycle DucyIRC8M 45 50 55 % VDD = VDDA = 3.3 V 65
Low speed internal oscillator (IRC40K) frequency fIRC40K 28 40 60 kHz VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 65
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -4 5 % VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 66
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -3 3 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 66
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -2 2 % VDD = VDDA = 3.3 V, TA = 25 °C 66
IRC48M oscillator duty cycle DucyIRC48M 45 50 55 % VDD = VDDA = 3.3 V 66
PLL input clock frequency fPLLIN 1 8 25 MHz 66
PLL output clock frequency fPLLOUT 16 120 MHz 66
VCO output frequency fVCO 32 240 MHz 66
PLL lock time tLOCK 300 μs 66
Number of guaranteed program/erase cycles before failure (Endurance) PECYC 100 kcycles TA = -40 °C ~ +85 °C 67
Word programming time tPROG 37 44 μs TA = -40 °C ~ +85 °C 67
Page erase time tERASE 3.2 4 ms TA = -40 °C ~ +85 °C 67
NRST input low level voltage VIL(NRST) -0.5 V 1.8 V ≤ VDD = VDDA ≤ 3.6 V 67
Low level output voltage (IIO = +8 mA) VOL 0.11 V VDD = 3.6 V, IIO = +8 mA 68
Low level output voltage (IIO = +20 mA) VOL 0.27 V VDD = 3.6 V, IIO = +20 mA 68
High level output voltage (IIO = +8 mA) VOH 3.45 V VDD = 3.6 V, IIO = +8 mA 68
High level output voltage (IIO = +20 mA) VOH 3.23 V VDD = 3.6 V, IIO = +20 mA 69
Junction-to-ambient thermal resistance, LQFP64 θJA 54.57 °C/W Natural convection, 2S2P PCB 94
Junction-to-board thermal resistance, LQFP64 θJB 35.08 °C/W Cold plate, 2S2P PCB 94
Junction-to-case thermal resistance, LQFP64 θJC 18.11 °C/W Cold plate, 2S2P PCB 95

CAD (KiCad official)

  • Symbol: GD32C103RBT6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: gd32c103rbt6-etched.step / gd32c103rbt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32c103rbt6.step / gd32c103rbt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (99 pp, sha256 bd4df4decb53d015, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF