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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs gd25wd10ctigr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
gd25wd10ctigr-etched.fit.json gd25wd10ctigr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
gd25wd10ctigr-etched.glb gd25wd10ctigr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
gd25wd10ctigr-etched.step gd25wd10ctigr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
gd25wd10ctigr.glb Publish 0.1.0 · Ray
gd25wd10ctigr.kicad_mod Publish 0.1.0 · Ray
gd25wd10ctigr.kicad_sym Publish 0.1.0 · Ray
gd25wd10ctigr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
gd25wd10ctigr.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json gd25wd10ctigr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md gd25wd10ctigr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

GD25WD10CTIGR

GigaDevice Semicon Beijing · NOR FLASH · SOP-8-150mil

GD25WD10CTIGR from GigaDevice Semicon Beijing, in a SOP-8-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS# input Active-low chip select input. Enables the SPI interface when driven low; must be driven high (deselected) when the chip is not being accessed. Do not leave floating after power-on.
2 SO/IO1 bidirectional Serial data output in standard SPI mode (SO). In Dual Output Fast Read (3BH) mode this pin becomes bidirectional IO1. Data shifts out on the falling edge of SCLK.
3 WP# input Active-low hardware write-protect input. When low, freezes the BP0-BP2 and SRP bits of the status register, preventing modification of the software-defined protected region.
4 VSS power_in Ground reference (0V) for the device.
5 SI/IO0 bidirectional Serial data input in standard SPI mode (SI). In Dual Output Fast Read (3BH) mode this pin becomes bidirectional IO0. Data is latched on the rising edge of SCLK.
6 SCLK input Serial clock input. Supports SPI Modes 0 and 3. Up to 100MHz on 3.0-3.6V, 70MHz on 2.1-3.0V, 50MHz on 1.65-2.1V.
7 NC unconnected No internal connection. Can be left floating or tied to any potential.
8 VCC power_in Single power supply input. Full operating range 1.65V to 3.6V. Decouple with a local bypass capacitor to VSS.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package SOP-8-150mil
Category Memory
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • GD25WD10CTIGR
  • GD25WD10CTIGT
  • GD25WD10CTIGY
  • GD25WD10CTIGRCTJG
  • GD25WD10CTIGRCTEG
  • GD25WD10CTIGRCTFG
  • GD25WD10CTIGRCSIG
  • GD25WD10CTIGRCSJG
  • GD25WD10CTIGRCSEG
  • GD25WD10CTIGRCSFG
  • GD25WD10CTIGRCOIG
  • GD25WD10CTIGRCOJG
  • GD25WD10CTIGRCOEG
  • GD25WD10CTIGRCOFG
  • GD25WD10CTIGRCKIG
  • GD25WD10CTIGRCKJG
  • GD25WD10CTIGRCKEG
  • GD25WD10CTIGRCKFG
  • GD25WD10CTIGRCEIG
  • GD25WD10CTIGRCEJG
  • GD25WD10CTIGRCEEG
  • GD25WD10CTIGRCEFG
  • GD25WD10CTIGRCK6IG
  • GD25WD10CTIGRCK6JG
  • GD25WD10CTIGRCK6EG
  • GD25WD10CTIGRCK6FG

CAD (KiCad official)

  • Symbol: GD25WD10CTIGR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8-150mil (KiCad packages3D, STEP)
  • 3D model files: gd25wd10ctigr-etched.step / gd25wd10ctigr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd25wd10ctigr.step / gd25wd10ctigr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
gd25wd10ctigr.step 122 KB You want the bare part, or you mark your own boards.
gd25wd10ctigr-etched.step 2.5 MB You want the part with GD25WD10CTIGR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 625 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (45 pp, sha256 ef2be06635296ee8, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF