GD25Q32CSIGR

{
  "schema_version": 1,
  "type": "component",
  "slug": "gd25q32csigr",
  "title": "GD25Q32CSIGR",
  "brief": "GigaDevice Semicon Beijing NOR FLASH, SOIC-8-208mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "memory",
    "gd25q32csigr"
  ],
  "component": {
    "mpn": "GD25Q32CSIGR",
    "manufacturer": "GigaDevice Semicon Beijing",
    "package": "SOIC-8-208mil",
    "pin_count": 8,
    "category": "Memory",
    "subcategory": "NOR FLASH",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/bd0c029ebce7e5eb866480e487bf3052.pdf",
    "parts": {
      "symbol": "gd25q32csigr.kicad_sym",
      "footprint": "gd25q32csigr.kicad_mod",
      "model_3d": "gd25q32csigr-etched.glb",
      "model_3d_plain": "gd25q32csigr.glb",
      "model_3d_step": "gd25q32csigr-etched.step",
      "model_3d_step_plain": "gd25q32csigr.step",
      "lbr": "gd25q32csigr.lbr"
    },
    "distributor_links": {
      "lcsc": "C318845"
    },
    "pins": [
      {
        "number": "1",
        "name": "CS#",
        "type": "input",
        "description": "Active-low Chip Select input. Must be driven high when the chip is not selected to place the device in standby; must not be left floating after power is on. Drive low to initiate SPI/Dual-SPI/Quad-SPI commands."
      },
      {
        "number": "2",
        "name": "SO/IO1",
        "type": "bidirectional",
        "description": "Serial Data Output in Standard SPI mode. Becomes bidirectional Data Input/Output 1 (IO1) in Dual and Quad SPI modes. Data shifts on the falling edge of SCLK in standard SPI."
      },
      {
        "number": "3",
        "name": "WP#/IO2",
        "type": "bidirectional",
        "description": "Active-low Write Protect input in Standard/Dual SPI modes, used to hardware-protect the writable bits of the Status Register. Becomes bidirectional Data Input/Output 2 (IO2) when Quad SPI is enabled (QE=1)."
      },
      {
        "number": "4",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference (0 V) for the device."
      },
      {
        "number": "5",
        "name": "SI/IO0",
        "type": "bidirectional",
        "description": "Serial Data Input in Standard SPI mode; latched on the rising edge of SCLK. Becomes bidirectional Data Input/Output 0 (IO0) in Dual and Quad SPI modes."
      },
      {
        "number": "6",
        "name": "SCLK",
        "type": "input",
        "description": "Serial Clock input. Provides the timing for all serial input/output operations; both SPI modes 0 and 3 are supported. Rated for up to 120 MHz for fast-read operations (30 pF load)."
      },
      {
        "number": "7",
        "name": "HOLD#/IO3",
        "type": "bidirectional",
        "description": "Active-low Hold input (with QE=0) that pauses serial communication without deselecting the device. Becomes bidirectional Data Input/Output 3 (IO3) when Quad SPI is enabled (QE=1); in that case HOLD# functionality is disabled."
      },
      {
        "number": "8",
        "name": "VCC",
        "type": "power_in",
        "description": "Main power supply input. Full operating range 2.7-3.6 V (nominal 3.3 V). Maximum active current 20 mA; power-down current 1 uA typical."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/bd0c029ebce7e5eb866480e487bf3052.pdf",
        "pages": 62,
        "sha256": "0d8e1516de769ea8",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -1.905
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
      "mark": "drawn"
    },
    "models_3d": [
      {
        "file": "gd25q32csigr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "gd25q32csigr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "a53f528421036bc9a6df565a7013c73012b44e87bbd0d187ff1035b50fbd2b97",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "GigaDevice Semicon Beijing",
      "Package": "SOIC-8-208mil",
      "Category": "Memory",
      "Pins": "8"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "gd25q32csigr"
  ],
  "discovery_pitch": "GD25Q32CSIGR (GigaDevice Semicon Beijing) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "gd25q32csigr.kicad_sym",
    "gd25q32csigr.kicad_mod",
    "gd25q32csigr.glb",
    "gd25q32csigr.step",
    "gd25q32csigr-etched.step",
    "gd25q32csigr.lbr",
    "docs/hero.png",
    "docs/gd25q32csigr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "GD25Q32CSIGR",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGY",
      "kind": "unknown"
    },
    {
      "mpn": "GD25Q32CSIGRCSMGR",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCSMGY",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCTIGR",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCTIGY",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCVIGR",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCVIGY",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCPIGR",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCPIGY",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCWIGR",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCWIGY",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCHIGR",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCHIGY",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCNIGR",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCNIGY",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCZIGR",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCZIGY",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCBIGR",
      "kind": "packaging"
    },
    {
      "mpn": "GD25Q32CSIGRCBIGY",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-24T20:57:55.542Z"
}