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GD25Q256DYIGR

Public Made by Adom

by adom

GigaDevice Semicon Beijing NOR FLASH, WSON-8-EP(6x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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GD25Q256DYIGR

GigaDevice Semicon Beijing · NOR FLASH · WSON-8-EP(6x8)

GD25Q256DYIGR from GigaDevice Semicon Beijing, in a WSON-8-EP(6x8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS# input Chip Select Input; CS# must be driven high when the chip is not selected and must not be left floating at any time after power is on.
2 SO (IO1) bidirectional Data Output (Data Input Output 1), the serial data output in standard SPI and an I/O line in Dual/Quad SPI.
3 WP# (IO2) bidirectional Write Protect Input (Data Input Output 2), which also serves as an I/O line in Quad SPI.
4 VSS power_in Ground.
5 SI (IO0) bidirectional Data Input (Data Input Output 0), the serial data input in standard SPI and an I/O line in Dual/Quad SPI.
6 SCLK input Serial Clock Input.
7 HOLD#/RESET# (IO3) bidirectional Hold or Reset Input (Data Input Output 3); the ordering code suffix R denotes the RESET# function for this part.
8 VCC power_in Power Supply; the device is specified for a single supply of 2.7 to 3.6V.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package WSON-8-EP(6x8)
Category Memory
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Leakage Current ILI -2 2 μA 72
Output Leakage Current ILO -2 2 μA 72
Standby Current ICC1 12 50 μA CS#=VCC, VIN=VCC or VSS 72
Deep Power-Down Current ICC2 1 8 μA CS#=VCC, VIN=VCC or VSS 72
Operating Current (Read) ICC3 15 25 mA CLK=0.1VCC / 0.9VCC at 104MHz, Q=Open(*1,*2,*4 I/O) 72
Operating Current (Read) ICC3 13 20 mA CLK=0.1VCC / 0.9VCC at 80MHz, Q=Open(*1,*2,*4 I/O) 72
Operating Current (PP) ICC4 25 mA CS#=VCC 72
Operating Current (WRSR) ICC5 25 mA CS#=VCC 72
Operating Current (SE) ICC6 25 mA CS#=VCC 72
Operating Current (BE) ICC7 25 mA CS#=VCC 72
Operating Current (CE) ICC8 25 mA CS#=VCC 72
Input Low Voltage VIL -0.5 V 72
Output Low Voltage VOL 0.2 V IOL =100μA 72
Supply Voltage (VCC) VCC 2.7 3.6 V 72
Ambient Operating Temperature -40 85 ℃ 70
Storage Temperature -65 150 ℃ 70
Applied Input/Output Voltage -0.6 V 70
Transient Input/Output Voltage (overshoot) -2 V 70
VCC Supply Voltage VCC -0.6 4.2 V 70
VCC (min) To CS# Low tVSL 2.5 ms 70
Write Inhibit Voltage VWI 1.5 2.5 V 70
Input Capacitance CIN 6 pF VIN=0V 71
Output Capacitance COUT 8 pF VOUT=0V 71
Serial Clock Frequency for all instructions except Read fC 104 MHz 75
Serial Clock Frequency for Dual/Quad/Fast Read on 3.0-3.6V fC1 104 MHz 75
Serial Clock Frequency for Dual/Quad/Fast Read on 2.7-3.0V fC2 80 MHz 75
Serial Clock Frequency For Read (03H, 13H) fR 50 MHz 75
Serial Clock High Time tCLH 3.7 ns 75
Serial Clock Low Time tCLL 3.7 ns 75
Serial Clock Rise Time (Slew Rate) tCLCH 0.2 V/ns 75
Serial Clock Fall Time (Slew Rate) tCHCL 0.2 V/ns 75
CS# Active Setup Time tSLCH 8 ns 75
CS# Active Hold Time tCHSH 5 ns 75
CS# Not Active Setup Time tSHCH 5 ns 75
CS# Not Active Hold Time tCHSL 5 ns 75
CS# High Time (Read/Write) tSHSL 20 ns 75
Output Disable Time tSHQZ 6 ns 75
Output Hold Time tCLQX 1.8 ns 75
Data In Setup Time tDVCH 2 ns 75
Data In Hold Time tCHDX 2 ns 75
HOLD# Low To High-Z Output tHLQZ 6 ns 75
HOLD# High To Low-Z Output tHHQX 8 ns 75
Clock Low To Output Valid tCLQV 7 ns 75
Write Protect Setup Time Before CS# Low tWHSL 20 ns 75
Write Protect Hold Time After CS# High tSHWL 100 ns 75
CS# High To Deep Power-Down Mode tDP 20 μs 75
CS# High To Standby Mode Without Electronic Signature Read tRES1 30 μs 75
CS# High To Standby Mode With Electronic Signature Read tRES2 30 μs 75
CS# High To Next Command After Suspend tSUS 20 μs 75
Latency Between Resume And Next Suspend tRS 100 μs 75
CS# High To Next Command After Reset (Except From Erase) tRST 30 μs 75
CS# High To Next Command After Reset (From Erase) tRST_E 12 ms 75
Write Status Register Cycle Time tW 5 20 ms 76
Byte Program Time (First Byte) tBP1 30 50 μs 76
Additional Byte Program Time (After First Byte) tBP2 2.5 12 μs 76
Page Programming Time tPP 0.4 2.4 ms 76
Sector Erase Time tSE 70 400 ms 76
Block Erase Time (32K Bytes) tBE1 0.16 0.8 s 76
Block Erase Time (64K Bytes) tBE2 0.22 1 s 76
Chip Erase Time (GD25Q256D) tCE 70 200 s 76

CAD (KiCad official)

  • Symbol: GD25Q256DYIGR
  • Footprint: Package_SON:WSON-8-1EP_8x6mm_P1.27mm_EP3.4x4.3mm
  • 3D model: WSON-8-EP(6x8), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: gd25q256dyigr-etched.step / gd25q256dyigr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd25q256dyigr.step / gd25q256dyigr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (88 pp, sha256 8768aa3c2454945e, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF