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GD25Q16CSIGR

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GigaDevice Semicon Beijing Global Sourcing Parts, SOP-8-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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GD25Q16CSIGR

GigaDevice Semicon Beijing · Global Sourcing Parts · SOP-8-208mil

GD25Q16CSIGR from GigaDevice Semicon Beijing, in a SOP-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS# input Chip Select input; it must be driven high when the chip is not selected and must not be left floating at any time after power is applied.
2 SO (IO1) bidirectional Data output (Data Input Output 1), which serves as IO1 in Dual/Quad SPI modes.
3 WP# (IO2) bidirectional Write Protect input (Data Input Output 2), which serves as IO2 in Quad SPI mode.
4 VSS power_in Ground reference for the device.
5 SI (IO0) bidirectional Data input (Data Input Output 0), which serves as IO0 in Dual/Quad SPI modes.
6 SCLK input Serial clock input for the SPI interface.
7 HOLD# (IO3) bidirectional Hold input (Data Input Output 3), which serves as IO3 in Quad SPI mode.
8 VCC power_in Power supply; the datasheet gives a single-supply full voltage range of 2.7 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package SOP-8-208mil
Category Global Sourcing Parts
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient Operating Temperature (Industrial, I grade) -40 85 ℃ Temperature range I; J grade is -40 to 105, E grade is -40 to 125 42
Storage Temperature -65 150 ℃ 42
VCC Supply Voltage VCC -0.6 4.2 V 42
Transient Input / Output Voltage (overshoot) -2 V Overshoot; upper limit printed as VCC+2.0 42
Applied Input / Output Voltage -0.6 V Upper limit printed as VCC+0.4 42
Supply Voltage Range VCC 2.7 3.6 V T= -40℃~85℃ 44
Write Inhibit Voltage VWI 1.5 2.5 V Power-up timing 42
VCC (min) To CS# Low tVSL 1.8 ms 42
Input Leakage Current ILI -2 2 μA 44
Output Leakage Current ILO -2 2 μA 44
Standby Current ICC1 1 5 μA CS#=VCC, VIN=VCC or VSS 44
Deep Power-Down Current ICC2 1 5 μA CS#=VCC, VIN=VCC or VSS 44
Operating Current (Read) ICC3 15 20 mA CLK=0.1VCC / 0.9VCC at 120MHz, Q=Open(*1,*2,*4 I/O) 44
Operating Current (Read) ICC3 13 18 mA CLK=0.1VCC / 0.9VCC at 80MHz, Q=Open(*1,*2,*4 I/O) 44
Operating Current (PP) ICC4 20 mA CS#=VCC 44
Operating Current (WRSR) ICC5 20 mA CS#=VCC 44
Operating Current (SE) ICC6 20 mA CS#=VCC 44
Operating Current (BE) ICC7 20 mA CS#=VCC 44
Operating Current (CE) ICC8 20 mA CS#=VCC 44
High Performance Current ICC9 0.6 1.2 mA 44
Output Low Voltage VOL 0.2 V IOL =100μA 44
Serial Clock Frequency For Dual I/O (BBH), Quad I/O (EBH), Quad Output (6BH) without High Performance Mode FC 104 MHz on 3.0V-3.6V power supply 47
Serial Clock Frequency For Dual I/O (BBH), Quad I/O (EBH), Quad Output (6BH) without High Performance Mode fC1 80 MHz on 2.7V-3.0V power supply 47
Serial Clock Frequency For Dual I/O (BBH), Quad I/O (EBH), Quad Output (6BH) with High Performance Mode fC2 120 MHz on 2.7V-3.6V power supply 47
Serial Clock Frequency For Fast Read (0BH), Write Status Register (01H) fC3 120 MHz on 2.7V-3.6V power supply, with or without High Performance Mode 47
Serial Clock Frequency For Read (03H), Read ID (90H, 9FH and ABH), Read Status Register (05H and 35H) fR 80 MHz 47
Serial Clock High Time tCLH 4 ns 47
Serial Clock Low Time tCLL 4 ns 47
CS# Active Setup Time tSLCH 5 ns 47
CS# Active Hold Time tCHSH 5 ns 47
CS# Not Active Setup Time tSHCH 5 ns 47
CS# Not Active Hold Time tCHSL 5 ns 47
CS# High Time (Read/Write) tSHSL 20 ns 47
Output Disable Time tSHQZ 6 ns 47
Output Hold Time tCLQX 1.2 ns 47
Data In Setup Time tDVCH 2 ns 47
Data In Hold Time tCHDX 2 ns 47
HOLD# Low To High-Z Output tHLQZ 6 ns 47
HOLD# High To Low-Z Output tHHQX 6 ns 47
Clock Low To Output Valid tCLQV 7 ns 47
Write Protect Setup Time Before CS# Low tWHSL 20 ns 47
Write Protect Hold Time After CS# High tSHWL 100 ns 47
CS# High To Deep Power-Down Mode tDP 20 μs 47
CS# High To Standby Mode Without Electronic Signature Read tRES1 20 μs 48
CS# High To Standby Mode With Electronic Signature Read tRES2 20 μs 48
CS# High To Next Command After Suspend tSUS 20 μs 48
Latency Between Resume And Next Suspend tRS 100 μs 48
CS# High To Next Command After Reset (Except From Erase) tRST 30 μs 48
CS# High To Next Command After Reset (From Erase) tRST_E 12 ms 48
Write Status Register Cycle Time tW 5 30 ms 48
Byte Program Time (First Byte) tBP1 30 50 μs 48
Additional Byte Program Time (After First Byte) tBP2 2.5 12 μs 48
Page Programming Time tPP 0.6 2.4 ms 48
Sector Erase Time (4K Bytes) tSE 45 300 ms 48
Block Erase Time (32K Bytes) tBE1 0.15 1.2 s 48
Block Erase Time (64K Bytes) tBE2 0.25 2 s 48
Chip Erase Time (GD25Q16C) tCE 7 20 s 48

CAD (KiCad official)

  • Symbol: GD25Q16CSIGR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8-208mil (KiCad packages3D, STEP)
  • 3D model files: gd25q16csigr-etched.step / gd25q16csigr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd25q16csigr.step / gd25q16csigr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (68 pp, sha256 c2195b7e82b0309e, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF