component
GD25Q16CEIGR
Public Made by Adomby adom
GigaDevice Semicon Beijing NOR FLASH, USON-8(2x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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GD25Q16CEIGR
GigaDevice Semicon Beijing · NOR FLASH · USON-8(2x3)
GD25Q16CEIGR from GigaDevice Semicon Beijing, in a USON-8(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS# | input | Chip Select input; must be driven high when the device is not selected and must not be left floating after power-on. |
| 2 | SO (IO1) | bidirectional | Serial data output in standard SPI and Data Input/Output 1 in dual and quad SPI. |
| 3 | WP# (IO2) | bidirectional | Write Protect input in standard and dual SPI and Data Input/Output 2 in quad SPI. |
| 4 | VSS | power_in | Ground. |
| 5 | SI (IO0) | bidirectional | Serial data input in standard SPI and Data Input/Output 0 in dual and quad SPI. |
| 6 | SCLK | input | Serial Clock input. |
| 7 | HOLD# (IO3) | bidirectional | Hold input in standard and dual SPI and Data Input/Output 3 in quad SPI. |
| 8 | VCC | power_in | Power supply input for a single supply voltage range of 2.7 to 3.6V. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GigaDevice Semicon Beijing |
| Package | USON-8(2x3) |
| Category | Memory |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Leakage Current | ILI | -2 | 2 | μA | 44 | ||
| Output Leakage Current | ILO | -2 | 2 | μA | 44 | ||
| Standby Current | ICC1 | 1 | 5 | μA | CS#=VCC, VIN=VCC or VSS | 44 | |
| Deep Power-Down Current | ICC2 | 1 | 5 | μA | CS#=VCC, VIN=VCC or VSS | 44 | |
| Operating Current (Read) 120MHz | ICC3 | 15 | 20 | mA | CLK=0.1VCC/0.9VCC at 120MHz, Q=Open(*1,*2,*4 I/O) | 44 | |
| Operating Current (Read) 80MHz | ICC3 | 13 | 18 | mA | CLK=0.1VCC/0.9VCC at 80MHz, Q=Open(*1,*2,*4 I/O) | 44 | |
| Operating Current (PP) | ICC4 | 20 | mA | CS#=VCC | 44 | ||
| Operating Current (WRSR) | ICC5 | 20 | mA | CS#=VCC | 44 | ||
| Operating Current (SE) | ICC6 | 20 | mA | CS#=VCC | 44 | ||
| Operating Current (BE) | ICC7 | 20 | mA | CS#=VCC | 44 | ||
| Operating Current (CE) | ICC8 | 20 | mA | CS#=VCC | 44 | ||
| High Performance Current | ICC9 | 0.6 | 1.2 | mA | 44 | ||
| Input Low Voltage | VIL | 0.2 | VCC | printed as 0.2VCC | 44 | ||
| Input High Voltage | VIH | 0.7 | VCC | printed as 0.7VCC | 44 | ||
| Output Low Voltage | VOL | 0.2 | V | IOL=100μA | 44 | ||
| Supply Voltage | VCC | 2.7 | 3.6 | V | Full voltage range | 4 | |
| Operating Temperature (I grade) | T | -40 | 85 | ℃ | DC/AC characteristics range | 44 | |
| Supply Voltage | VCC | -0.6 | 4.2 | V | 42 | ||
| Applied Input / Output Voltage | -0.6 | V | -0.6 to VCC+0.4 | 42 | |||
| Transient Input / Output Voltage (overshoot) | -2 | V | -2.0 to VCC+2.0 | 42 | |||
| Storage Temperature | -65 | 150 | ℃ | 42 | |||
| VCC (min) to CS# Low | tVSL | 1.8 | ms | 42 | |||
| Write Inhibit Voltage | VWI | 1.5 | 2.5 | V | 42 | ||
| Input Capacitance | CIN | 6 | pF | VIN=0V | 43 | ||
| Output Capacitance | COUT | 8 | pF | VOUT=0V | 43 | ||
| Serial Clock Frequency (Dual/Quad, no HPM, 3.0-3.6V) | FC | 104 | MHz | CL=30pF, VCC=2.7~3.6V | 47 | ||
| Serial Clock Frequency (Dual/Quad, no HPM, 2.7-3.0V) | fC1 | 80 | MHz | CL=30pF | 47 | ||
| Serial Clock Frequency (Dual/Quad, with HPM) | fC2 | 120 | MHz | CL=30pF | 47 | ||
| Serial Clock Frequency (Fast Read, WRSR) | fC3 | 120 | MHz | CL=30pF | 47 | ||
| Serial Clock Frequency (Read 03H, ID, Status) | fR | 80 | MHz | CL=30pF | 47 | ||
| Serial Clock High Time | tCLH | 4 | ns | 47 | |||
| Serial Clock Low Time | tCLL | 4 | ns | 47 | |||
| Serial Clock Rise Time (Slew Rate) | tCLCH | 0.1 | V/ns | 47 | |||
| Serial Clock Fall Time (Slew Rate) | tCHCL | 0.1 | V/ns | 47 | |||
| CS# Active Setup Time | tSLCH | 5 | ns | 47 | |||
| CS# Active Hold Time | tCHSH | 5 | ns | 47 | |||
| CS# Not Active Setup Time | tSHCH | 5 | ns | 47 | |||
| CS# Not Active Hold Time | tCHSL | 5 | ns | 47 | |||
| CS# High Time (Read/Write) | tSHSL | 20 | ns | 47 | |||
| Output Disable Time | tSHQZ | 6 | ns | 47 | |||
| Output Hold Time | tCLQX | 1.2 | ns | 47 | |||
| Data In Setup Time | tDVCH | 2 | ns | 47 | |||
| Data In Hold Time | tCHDX | 2 | ns | 47 | |||
| Clock Low To Output Valid | tCLQV | 7 | ns | 47 | |||
| Write Protect Setup Time Before CS# Low | tWHSL | 20 | ns | 47 | |||
| Write Protect Hold Time After CS# High | tSHWL | 100 | ns | 47 | |||
| CS# High To Deep Power-Down Mode | tDP | 20 | μs | 47 | |||
| CS# High To Standby Mode Without Electronic Signature Read | tRES1 | 20 | μs | 48 | |||
| CS# High To Standby Mode With Electronic Signature Read | tRES2 | 20 | μs | 48 | |||
| CS# High To Next Command After Suspend | tSUS | 20 | μs | 48 | |||
| Latency Between Resume And Next Suspend | tRS | 100 | μs | 48 | |||
| CS# High To Next Command After Reset (Except From Erase) | tRST | 30 | μs | 48 | |||
| CS# High To Next Command After Reset (From Erase) | tRST_E | 12 | ms | 48 | |||
| Write Status Register Cycle Time | tW | 5 | 30 | ms | 48 | ||
| Byte Program Time (First Byte) | tBP1 | 30 | 50 | μs | 48 | ||
| Additional Byte Program Time | tBP2 | 2.5 | 12 | μs | After first byte | 48 | |
| Page Programming Time | tPP | 0.6 | 2.4 | ms | 48 | ||
| Sector Erase Time (4K Bytes) | tSE | 45 | 300 | ms | 48 | ||
| Block Erase Time (32K Bytes) | tBE1 | 0.15 | 1.2 | s | 48 | ||
| Block Erase Time (64K Bytes) | tBE2 | 0.25 | 2 | s | 48 | ||
| Chip Erase Time | tCE | 7 | 20 | s | 48 |
CAD (KiCad official)
- Symbol:
GD25Q16CEIGR - Footprint:
Package_SON:SON-8-1EP_3x2mm_P0.5mm_EP1.4x1.6mm - 3D model: USON-8(2x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
gd25q16ceigr-etched.step/gd25q16ceigr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);gd25q16ceigr.step/gd25q16ceigr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GigaDevice Semicon Beijing datasheet (69 pp, sha256
6f7024a13657c87b, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# GD25Q16CEIGR
**GigaDevice Semicon Beijing** · NOR FLASH · USON-8(2x3)
GD25Q16CEIGR from GigaDevice Semicon Beijing, in a USON-8(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS# | input | Chip Select input; must be driven high when the device is not selected and must not be left floating after power-on. |
| 2 | SO (IO1) | bidirectional | Serial data output in standard SPI and Data Input/Output 1 in dual and quad SPI. |
| 3 | WP# (IO2) | bidirectional | Write Protect input in standard and dual SPI and Data Input/Output 2 in quad SPI. |
| 4 | VSS | power_in | Ground. |
| 5 | SI (IO0) | bidirectional | Serial data input in standard SPI and Data Input/Output 0 in dual and quad SPI. |
| 6 | SCLK | input | Serial Clock input. |
| 7 | HOLD# (IO3) | bidirectional | Hold input in standard and dual SPI and Data Input/Output 3 in quad SPI. |
| 8 | VCC | power_in | Power supply input for a single supply voltage range of 2.7 to 3.6V. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GigaDevice Semicon Beijing |
| Package | USON-8(2x3) |
| Category | Memory |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Leakage Current | ILI | -2 | | 2 | μA | | 44 |
| Output Leakage Current | ILO | -2 | | 2 | μA | | 44 |
| Standby Current | ICC1 | | 1 | 5 | μA | CS#=VCC, VIN=VCC or VSS | 44 |
| Deep Power-Down Current | ICC2 | | 1 | 5 | μA | CS#=VCC, VIN=VCC or VSS | 44 |
| Operating Current (Read) 120MHz | ICC3 | | 15 | 20 | mA | CLK=0.1VCC/0.9VCC at 120MHz, Q=Open(*1,*2,*4 I/O) | 44 |
| Operating Current (Read) 80MHz | ICC3 | | 13 | 18 | mA | CLK=0.1VCC/0.9VCC at 80MHz, Q=Open(*1,*2,*4 I/O) | 44 |
| Operating Current (PP) | ICC4 | | | 20 | mA | CS#=VCC | 44 |
| Operating Current (WRSR) | ICC5 | | | 20 | mA | CS#=VCC | 44 |
| Operating Current (SE) | ICC6 | | | 20 | mA | CS#=VCC | 44 |
| Operating Current (BE) | ICC7 | | | 20 | mA | CS#=VCC | 44 |
| Operating Current (CE) | ICC8 | | | 20 | mA | CS#=VCC | 44 |
| High Performance Current | ICC9 | | 0.6 | 1.2 | mA | | 44 |
| Input Low Voltage | VIL | | | 0.2 | VCC | printed as 0.2VCC | 44 |
| Input High Voltage | VIH | 0.7 | | | VCC | printed as 0.7VCC | 44 |
| Output Low Voltage | VOL | | | 0.2 | V | IOL=100μA | 44 |
| Supply Voltage | VCC | 2.7 | | 3.6 | V | Full voltage range | 4 |
| Operating Temperature (I grade) | T | -40 | | 85 | ℃ | DC/AC characteristics range | 44 |
| Supply Voltage | VCC | -0.6 | | 4.2 | V | | 42 |
| Applied Input / Output Voltage | | -0.6 | | | V | -0.6 to VCC+0.4 | 42 |
| Transient Input / Output Voltage (overshoot) | | -2 | | | V | -2.0 to VCC+2.0 | 42 |
| Storage Temperature | | -65 | | 150 | ℃ | | 42 |
| VCC (min) to CS# Low | tVSL | 1.8 | | | ms | | 42 |
| Write Inhibit Voltage | VWI | 1.5 | | 2.5 | V | | 42 |
| Input Capacitance | CIN | | | 6 | pF | VIN=0V | 43 |
| Output Capacitance | COUT | | | 8 | pF | VOUT=0V | 43 |
| Serial Clock Frequency (Dual/Quad, no HPM, 3.0-3.6V) | FC | | | 104 | MHz | CL=30pF, VCC=2.7~3.6V | 47 |
| Serial Clock Frequency (Dual/Quad, no HPM, 2.7-3.0V) | fC1 | | | 80 | MHz | CL=30pF | 47 |
| Serial Clock Frequency (Dual/Quad, with HPM) | fC2 | | | 120 | MHz | CL=30pF | 47 |
| Serial Clock Frequency (Fast Read, WRSR) | fC3 | | | 120 | MHz | CL=30pF | 47 |
| Serial Clock Frequency (Read 03H, ID, Status) | fR | | | 80 | MHz | CL=30pF | 47 |
| Serial Clock High Time | tCLH | 4 | | | ns | | 47 |
| Serial Clock Low Time | tCLL | 4 | | | ns | | 47 |
| Serial Clock Rise Time (Slew Rate) | tCLCH | 0.1 | | | V/ns | | 47 |
| Serial Clock Fall Time (Slew Rate) | tCHCL | 0.1 | | | V/ns | | 47 |
| CS# Active Setup Time | tSLCH | 5 | | | ns | | 47 |
| CS# Active Hold Time | tCHSH | 5 | | | ns | | 47 |
| CS# Not Active Setup Time | tSHCH | 5 | | | ns | | 47 |
| CS# Not Active Hold Time | tCHSL | 5 | | | ns | | 47 |
| CS# High Time (Read/Write) | tSHSL | 20 | | | ns | | 47 |
| Output Disable Time | tSHQZ | | | 6 | ns | | 47 |
| Output Hold Time | tCLQX | 1.2 | | | ns | | 47 |
| Data In Setup Time | tDVCH | 2 | | | ns | | 47 |
| Data In Hold Time | tCHDX | 2 | | | ns | | 47 |
| Clock Low To Output Valid | tCLQV | | | 7 | ns | | 47 |
| Write Protect Setup Time Before CS# Low | tWHSL | 20 | | | ns | | 47 |
| Write Protect Hold Time After CS# High | tSHWL | 100 | | | ns | | 47 |
| CS# High To Deep Power-Down Mode | tDP | | | 20 | μs | | 47 |
| CS# High To Standby Mode Without Electronic Signature Read | tRES1 | | | 20 | μs | | 48 |
| CS# High To Standby Mode With Electronic Signature Read | tRES2 | | | 20 | μs | | 48 |
| CS# High To Next Command After Suspend | tSUS | | | 20 | μs | | 48 |
| Latency Between Resume And Next Suspend | tRS | 100 | | | μs | | 48 |
| CS# High To Next Command After Reset (Except From Erase) | tRST | | | 30 | μs | | 48 |
| CS# High To Next Command After Reset (From Erase) | tRST_E | | | 12 | ms | | 48 |
| Write Status Register Cycle Time | tW | | 5 | 30 | ms | | 48 |
| Byte Program Time (First Byte) | tBP1 | | 30 | 50 | μs | | 48 |
| Additional Byte Program Time | tBP2 | | 2.5 | 12 | μs | After first byte | 48 |
| Page Programming Time | tPP | | 0.6 | 2.4 | ms | | 48 |
| Sector Erase Time (4K Bytes) | tSE | | 45 | 300 | ms | | 48 |
| Block Erase Time (32K Bytes) | tBE1 | | 0.15 | 1.2 | s | | 48 |
| Block Erase Time (64K Bytes) | tBE2 | | 0.25 | 2 | s | | 48 |
| Chip Erase Time | tCE | | 7 | 20 | s | | 48 |
## CAD (KiCad official)
- Symbol: `GD25Q16CEIGR`
- Footprint: `Package_SON:SON-8-1EP_3x2mm_P0.5mm_EP1.4x1.6mm`
- 3D model: USON-8(2x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `gd25q16ceigr-etched.step` / `gd25q16ceigr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `gd25q16ceigr.step` / `gd25q16ceigr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [GigaDevice Semicon Beijing datasheet](docs/gd25q16ceigr-datasheet.pdf) (69 pp, sha256 `6f7024a13657c87b`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/gd25q16ceigr-datasheet.pdf)