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GD25Q127CSIGR

GigaDevice Semicon Beijing · NOR FLASH · SOP-8-208mil

GD25Q127CSIGR from GigaDevice Semicon Beijing, in a SOP-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS# input Chip Select Input; CS# must be driven high when the chip is not selected and must not be left floating at any time after power is on.
2 SO (IO1) bidirectional Data Output (Data Input Output 1) in standard SPI, and IO1 data line in Dual/Quad SPI modes.
3 WP# (IO2) bidirectional Write Protect Input (Data Input Output 2), and IO2 data line in Quad SPI mode.
4 VSS power_in Ground.
5 SI (IO0) bidirectional Data Input (Data Input Output 0), and IO0 data line in Dual/Quad SPI modes.
6 SCLK input Serial Clock Input.
7 HOLD#/RESET# (IO3) bidirectional Hold or Reset Input (Data Input Output 3), and IO3 data line in Quad SPI mode.
8 VCC power_in Power Supply; single supply with full voltage range of 2.7~3.6V.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package SOP-8-208mil
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Leakage Current (Normal Mode) ILI -2 2 μA 47
Output Leakage Current (Normal Mode) ILO -2 2 μA 47
Standby Current (Normal Mode) ICC1 20 50 μA CS#=VCC, VIN=VCC or VSS 47
Deep Power-Down Current (Normal Mode) ICC2 1 5 μA CS#=VCC, VIN=VCC or VSS 47
Operating Current (Read) at 104MHz (Normal Mode) ICC3 15 20 mA CLK=0.1VCC / 0.9VCC at 104MHz, Q=Open(*1,*2,*4 I/O) 47
Operating Current (Read) at 80MHz (Normal Mode) ICC3 13 18 mA CLK=0.1VCC / 0.9VCC at 80MHz, Q=Open(*1,*2,*4 I/O) 47
Operating Current (PP) (Normal Mode) ICC4 27 mA CS#=VCC 47
Operating Current (WRSR) (Normal Mode) ICC5 27 mA CS#=VCC 47
Operating Current (SE) (Normal Mode) ICC6 27 mA CS#=VCC 47
Operating Current (BE) (Normal Mode) ICC7 27 mA CS#=VCC 47
Operating Current (CE) (Normal Mode) ICC8 27 mA CS#=VCC 47
Output Low Voltage (Normal Mode) VOL 0.2 V IOL =100μA 47
Input Leakage Current (Low Power Mode) ILI -2 2 μA 48
Output Leakage Current (Low Power Mode) ILO -2 2 μA 48
Standby Current (Low Power Mode) ICC1 20 50 μA CS#=VCC, VIN=VCC or VSS 48
Deep Power-Down Current (Low Power Mode) ICC2 1 5 μA CS#=VCC, VIN=VCC or VSS 48
Operating Current (Read) at 104MHz (Low Power Mode) ICC3 13 20 mA CLK=0.1VCC / 0.9VCC at 104MHz, Q=Open(*1,*2,*4 I/O) 48
Operating Current (Read) at 80MHz (Low Power Mode) ICC3 10 18 mA CLK=0.1VCC / 0.9VCC at 80MHz, Q=Open(*1,*2,*4 I/O) 48
Operating Current (PP) (Low Power Mode) ICC4 25 mA CS#=VCC 48
Operating Current (WRSR) (Low Power Mode) ICC5 25 mA CS#=VCC 48
Operating Current (SE) (Low Power Mode) ICC6 25 mA CS#=VCC 48
Operating Current (BE) (Low Power Mode) ICC7 25 mA CS#=VCC 48
Operating Current (CE) (Low Power Mode) ICC8 25 mA CS#=VCC 48
Output Low Voltage (Low Power Mode) VOL 0.2 V IOL =100μA 48
Ambient Operating Temperature -40 85 ℃ 45
Storage Temperature -65 150 ℃ 45
Supply Voltage (VCC) absolute VCC -0.6 4.2 V 45
Applied Input/Output Voltage -0.6 V 45
Transient Input/Output Voltage (overshoot) -2 V 45
Supply Voltage VCC 2.7 3.6 V T=-40℃~85℃ 47
VCC (min) To CS# Low tVSL 2.5 ms 45
Write Inhibit Voltage VWI 1.5 2.5 V 45
Serial Clock Frequency Fast Read (0BH) FC 104 MHz on 2.7V-3.6V power supply 53
Serial Clock Frequency Dual/Quad Output and I/O (3BH, 6BH, BBH, EBH, E7H) fC1 80 MHz on 2.7V-3.0V power supply 53
Serial Clock Frequency Dual/Quad Output and I/O (3BH, 6BH, BBH, EBH, E7H) fC2 104 MHz on 3.0V-3.6V power supply 53
Serial Clock Frequency Read (03H), 90H, 9FH fR 80 MHz 53
Serial Clock High Time tCLH 4.5 ns 53
Serial Clock Low Time tCLL 4.5 ns 53
CS# High Time (Read/Write) tSHSL 20 ns 53
Clock Low To Output Valid tCLQV 6.5 ns 53
Output Disable Time tSHQZ 6 ns 53
Data In Setup Time tDVCH 2 ns 53
Data In Hold Time tCHDX 2 ns 53
Write Protect Setup Time Before CS# Low tWHSL 20 ns 53
Write Protect Hold Time After CS# High tSHWL 100 ns 53
CS# High To Deep Power-Down Mode tDP 20 μs 53
CS# High To Standby Mode Without Electronic Signature Read tRES1 30 μs 53
CS# High To Standby Mode With Electronic Signature Read tRES2 30 μs 53
CS# High To Next Command After Suspend tSUS 20 μs 53
Latency Between Resume And Next Suspend tRS 100 μs 53
CS# High To Next Command After Reset (Except From Erase) tRST 30 μs 54
CS# High To Next Command After Reset (From Erase) tRST_E 12 ms 54
Write Status Register Cycle Time tW 5 30 ms 54
Byte Program Time (First Byte) tBP1 30 50 μs 54
Additional Byte Program Time (After First Byte) tBP2 2.5 12 μs 54
Page Programming Time tPP 0.5 2.4 ms 54
Sector Erase Time tSE 50 400 ms 54
Block Erase Time (32K Bytes) tBE1 0.16 0.8 s 54
Block Erase Time (64K Bytes) tBE2 0.3 1.2 s 54
Chip Erase Time (GD25Q127C) tCE 50 120 s 54

CAD (KiCad official)

  • Symbol: GD25Q127CSIGR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8-208mil (KiCad packages3D, STEP)
  • 3D model files: gd25q127csigr-etched.step / gd25q127csigr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd25q127csigr.step / gd25q127csigr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (79 pp, sha256 16c445635a0442a5, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF