component

GD25LQ16ETIGR

Public Made by Adom

by adom

GigaDevice Semicon Beijing NOR FLASH, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentmemorygd25lq16etigrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
gd25lq16etigr / README.md
History Download
Ray Publish 0.1.0 25812d8 4d ago

GD25LQ16ETIGR

GigaDevice Semicon Beijing · NOR FLASH · SOP-8

GD25LQ16ETIGR from GigaDevice Semicon Beijing, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS# input Chip Select Input; it must be driven high when the chip is not selected and must not be left floating at any time after power is applied.
2 SO (IO1) bidirectional Data Output (Data Input Output 1) in standard and dual SPI modes, and the IO1 data line in Quad/QPI modes.
3 WP# (IO2) bidirectional Write Protect Input (Data Input Output 2), which is the IO2 data line in Quad/QPI modes.
4 VSS power_in Ground reference for the device.
5 SI (IO0) bidirectional Data Input (Data Input Output 0), which is also the IO0 data line in Dual/Quad/QPI modes.
6 SCLK input Serial Clock Input for the SPI interface.
7 HOLD# (IO3) bidirectional Hold Input (Data Input Output 3), which is the IO3 data line in Quad/QPI modes.
8 VCC power_in Power Supply; the device operates from a single supply with a full voltage range of 1.65-2.1V (stated in the Features section, page 4).

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package SOP-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient Operating Temperature TA -40 85 ℃ 46
Storage Temperature -65 150 ℃ 46
Transient Input/Output Voltage -2 V note: overshoot 46
Applied Input/Output Voltage -0.6 V 46
VCC VCC -0.6 2.5 V 46
Input Leakage Current ILI -2 2 μA 48
Output Leakage Current ILO -2 2 μA 48
Standby Current ICC1 10 25 μA CS#=VCC, VIN=VCC or VSS 48
Deep Power-Down Current ICC2 1 8 μA CS#=VCC, VIN=VCC or VSS 48
Operating Current (Read) ICC3 10 15 mA CLK=0.1VCC / 0.9VCC at 133MHz, Q=Open(x4 I/O) 48
Operating Current (Read) ICC3 8 12 mA CLK=0.1VCC / 0.9VCC at 80MHz, Q=Open(x4 I/O) 48
Operating Current (Read) ICC3 3 5 mA CLK=0.1VCC / 0.9VCC at 80MHz, Q=Open(x1 I/O) 48
Operating Current (PP) ICC4 8 15 mA CS#=VCC 48
Operating Current (WRSR) ICC5 8 15 mA CS#=VCC 48
Operating Current (SE) ICC6 8 15 mA CS#=VCC 48
Operating Current (BE) ICC7 8 15 mA CS#=VCC 48
Operating Current (CE) ICC8 8 15 mA CS#=VCC 48
Output Low Voltage VOL 0.2 V IOL = 100μA 48
Serial Clock Frequency fC 133 MHz all commands except 03H 51
Serial Clock Frequency For Read fR 80 MHz Read (03H) 51
Serial Clock Rise Time (Slew Rate) tCLCH 0.2 V/ns 51
Serial Clock Fall Time (Slew Rate) tCHCL 0.2 V/ns 51
CS# Active Setup Time tSLCH 5 ns 51
CS# Active Hold Time tCHSH 5 ns 51
CS# Not Active Setup Time tSHCH 5 ns 51
CS# Not Active Hold Time tCHSL 5 ns 51
CS# High Time (Read/Write) tSHSL 20 ns 51
Output Disable Time tSHQZ 6 ns 51
Output Hold Time tCLQX 1.2 ns 51
Data In Setup Time tDVCH 2 ns 51
Data In Hold Time tCHDX 2 ns 51
HOLD# Low Setup Time (Relative To Clock) tHLCH 5 ns 51
HOLD# High Setup Time (Relative To Clock) tHHCH 5 ns 51
HOLD# Low Hold Time (Relative To Clock) tCHHH 5 ns 51
HOLD# High Hold Time (Relative To Clock) tCHHL 5 ns 51
HOLD# Low To High-Z Output tHLQZ 6 ns 51
HOLD# High To Low-Z Output tHHQX 6 ns 51
Clock Low To Output Valid tCLQV 7 ns CL = 30pF 51
Clock Low To Output Valid tCLQV 6 ns CL = 15pF 51
Write Protect Setup Time Before CS# Low tWHSL 20 ns 51
Write Protect Hold Time After CS# High tSHWL 100 ns 51
CS# High To Deep Power-Down Mode tDP 3 μs 51
CS# High To Standby Mode Without Electronic Signature Read tRES1 20 μs 51
CS# High To Standby Mode With Electronic Signature Read tRES2 20 μs 51
CS# High To Next Command After Suspend tSUS 20 μs 51
Latency Between Resume And Next Suspend tRS 100 μs 51
CS# High To Next Command After Reset (Except From Erase) tRST 30 μs 51
CS# High To Next Command After Reset (From Erase) tRST_E 12 ms 51
Write Status Register Cycle Time tW 2 25 ms 52
Byte Program Time (First Byte) tBP1 30 60 μs 52
Additional Byte Program Time (After First Byte) tBP2 2.5 5 μs 52
Page Programming Time tPP 0.4 2.4 ms 52
Sector Erase Time tSE 40 300 ms 52
Block Erase Time (32K Bytes) tBE1 0.15 0.8 s 52
Block Erase Time (64K Bytes) tBE2 0.2 1.2 s 52
Chip Erase Time (GD25LQ16E) tCE 4.5 10 s 52
VCC (min.) to device operation tVSL 700 μs 46
Write Inhibit Voltage VWI 1.4 V 46
VCC voltage needed to below VPWD for ensuring initialization will occur VPWD 0.5 V 46
The minimum duration for ensuring initialization will occur tPWD 300 μs 46

CAD (KiCad official)

  • Symbol: GD25LQ16ETIGR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: gd25lq16etigr-etched.step / gd25lq16etigr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd25lq16etigr.step / gd25lq16etigr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (69 pp, sha256 4a70848dd7db45fb, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF