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GD25B512MEYIGR

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GigaDevice Semicon Beijing Pre-ordered Chips, WSON-8-EP(6x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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GD25B512MEYIGR

GigaDevice Semicon Beijing · Pre-ordered Chips · WSON-8-EP(6x8)

GD25B512MEYIGR from GigaDevice Semicon Beijing, in a WSON-8-EP(6x8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS# input Chip select input; it must be driven high when the chip is not selected and must not be left floating after power is on.
2 SO (IO1) bidirectional Data output (data input output 1) in standard SPI and the IO1 data line in Quad SPI and QPI modes.
3 WP# (IO2) bidirectional Write protect input (data input output 2); if unused it must be driven high by the host or held high by an external pull-up resistor so it does not float.
4 VSS power_in Ground reference for the device.
5 SI (IO0) bidirectional Data input (data input output 0) in standard SPI and the IO0 data line in Quad SPI and QPI modes.
6 SCLK input Serial clock input.
7 IO3 bidirectional Data input output 3 used in Quad SPI and QPI modes.
8 VCC power_in Single power supply input; the full voltage range is 2.7 to 3.6V.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package WSON-8-EP(6x8)
Category Interface ICs
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient Operating Temperature (I grade) TA -40 85 ℃ Industrial I grade 57
Storage Temperature TSTG -65 150 ℃ 57
Transient Input/Output Voltage (overshoot) -2 V max VCC+2.0 V (overshoot) 57
Applied Input/Output Voltage -0.6 V max VCC+0.4 V 57
VCC Supply Voltage VCC -0.6 4.2 V 57
Write Inhibit Voltage VWI 1.5 2.5 V 57
VCC (min.) to device operation tVSL 1.8 ms 57
Input Leakage Current ILI -2 2 μA 59
Output Leakage Current ILO -2 2 μA 59
Standby Current ICC1 16 60 μA CS#=VCC, VIN=VCC or VSS 59
Deep Power-Down Current ICC2 2 25 μA CS#=VCC, VIN=VCC or VSS 59
Operating Current (Read) at 133MHz ICC3 20 35 mA CLK=0.1VCC / 0.9VCC at 133MHz, Q=Open(x4 I/O) 59
Operating Current (Read) at 90MHz DTR ICC3 30 45 mA CLK=0.1VCC / 0.9VCC at 90MHz DTR, Q=Open(x4 I/O) 59
Operating Current (PP) ICC4 15 30 mA CS#=VCC 59
Operating Current (WRSR) ICC5 15 30 mA CS#=VCC 59
Operating Current (SE) ICC6 15 30 mA CS#=VCC 59
Operating Current (BE) ICC7 15 30 mA CS#=VCC 59
Operating Current (CE) ICC8 15 30 mA CS#=VCC 59
Input Low Voltage VIL -0.5 V max 0.3VCC 59
Output Low Voltage VOL 0.2 V IOL = 100μA 59
Serial Clock Frequency (all instructions except 03H, 13H, EEH, EDH) fC1 133 MHz VCC=2.7~3.6V 62
Serial Clock Frequency for DTR Quad I/O Fast Read (EEH, EDH) fC2 90 MHz VCC=2.7~3.6V 62
Serial Clock Frequency for Read (03H, 13H) fR 60 MHz VCC=2.7~3.6V 62
Serial Clock Rise/Fall Time (Slew Rate) tCLCH/tCHCL 0.3 V/ns fSCLK≤50MHz 62
Serial Clock Rise/Fall Time (Slew Rate) tCLCH/tCHCL 0.6 V/ns fSCLK>50MHz 62
CS# Active Setup Time tSLCH 4 ns 62
CS# Active Hold Time tCHSH 4 ns 62
CS# Active Hold Time (DTR) tCLSH 4 ns 62
CS# Not Active Setup Time tSHCH 5 ns 62
CS# Not Active Hold Time tCHSL 5 ns 62
CS# High Time (Read) tSHSL 20 ns Read 62
CS# High Time (Write) tSHSL 40 ns Write 62
Output Disable Time tSHQZ 8 ns 62
Output Hold Time tCLQX/tCHQX 1.8 ns 62
Data In Setup Time (STR) tDVCH 2 ns STR 62
Data In Setup Time (DTR) tDVCH/tDVCL 1 ns DTR 62
Data In Hold Time (STR) tCHDX 2 ns STR 62
Data In Hold Time (DTR) tCHDX/tCLDX 1 ns DTR 62
Clock Low To Output Valid tCLQV/tCHQV 8 ns VCC=2.7~3.0V, loading=30pF 62
Clock Low To Output Valid tCLQV/tCHQV 7 ns VCC=2.7~3.0V, loading=10pF 62
Clock Low To Output Valid tCLQV/tCHQV 6 ns VCC=3.0~3.6V, loading=10pF, CR<3> = xxxx xx00b 62
Write Protect Setup Time Before CS# Low tWHSL 20 ns 62
Write Protect Hold Time After CS# High tSHWL 100 ns 62
CS# High To Deep Power-Down Mode tDP 3 μs 63
CS# High To Standby Mode Without Electronic Signature Read tRES1 30 μs 63
CS# High To Next Command After Suspend tSUS 20 μs 63
Latency Between Resume And Next Suspend tRS 100 μs 63
CS# High To Next Command After Reset (From Read or From Program) tRST 40 μs 63
CS# High To Next Command After Reset (From Erase or From Write Status/Non-volatile Configuration Register) tRST_E 25 ms 63
Write Status/Non-Volatile Configuration Register Cycle Time tW 5 30 ms 63
Byte Program Time (First Byte) tBP1 30 50 μs 63
Additional Byte Program Time (After First Byte) tBP2 2.5 12 μs 63
Page Programming Time tPP 0.15 1 ms 63
Sector Erase Time tSE 30 400 ms 63
Block Erase Time (32K Bytes) tBE1 0.15 1.5 s 63
Block Erase Time (64K Bytes) tBE2 0.22 2 s 63
Chip Erase Time (GD25B512ME) tCE 150 300 s 63
Reset Pulse Width tRLRH 1 μs 69
Reset Hold time before next Operation tRHSL 50 ns 69

CAD (KiCad official)

  • Symbol: GD25B512MEYIGR
  • Footprint: Package_SON:WSON-8-1EP_8x6mm_P1.27mm_EP3.4x4.3mm
  • 3D model: WSON-8-EP(6x8) (KiCad packages3D, STEP)
  • 3D model files: gd25b512meyigr-etched.step / gd25b512meyigr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd25b512meyigr.step / gd25b512meyigr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (77 pp, sha256 c625f8debf4a51f1, retrieved 2026-10-28, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF