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Contents

README

markdown

GC2M0040120D

SUPSiC · Silicon Carbide Field Effect Transistor (MOSFET) · TO-247-3

GC2M0040120D from SUPSiC, in a TO-247-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate control terminal with recommended operational voltage VGS = -5 V to +20 V and absolute maximum VGS = -10 V to +25 V.
2 Drain passive Drain terminal rated for maximum continuous drain current of 55 A at TC = 25°C and drain-source breakdown voltage of 1200 V.
3 Source passive Source terminal serving as reference point for gate-source voltage measurement and return path for drain current through the MOSFET channel.

Key specifications

Parameter Value
Manufacturer SUPSiC
Package TO-247-3
Category Silicon Carbide (SiC) Devices
Pins 3

CAD (KiCad official)

  • Symbol: GC2M0040120D
  • Footprint: Package_TO_SOT_THT:TO-247-3_Vertical
  • 3D model: TO-247-3 (KiCad packages3D, STEP)
  • 3D model files: gc2m0040120d-etched.step / gc2m0040120d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gc2m0040120d.step / gc2m0040120d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SUPSiC datasheet (4 pp, sha256 eb81896b9d0fd6c6, retrieved 2026-09-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF