Fusion - the Fusion 360 Bridge
Public Made by Adomby adom
Drive Autodesk Fusion 360 from the cloud via Adom Bridge: component libraries, IPC package generation, board layout, exports (STEP/Gerbers/BOM/CPL), fast APS cloud search, and parametric modeling.
master
BQ25792: cleaner routing and connected thermal copper
This experiment preserves Adonis's public BQ25792 Fusion board and the prior routing demonstrations. It calculates a new route plan with horizontal, vertical and 45-degree directions, reserves bottom copper for the MOSFET thermal-pad nets, and replays the accepted geometry in native Fusion on ConfRoomROG (CRR).
The reference has five CSD17581Q3A footprints, each with seven thermal holes. Their pad nets are VAC1 (Q1), VBUS (Q2 and Q4), VAC2 (Q3), and VBAT (Q5). Four higher-priority bottom pours reserve these regions; four lower-priority PGND pours retain remaining copper on the existing layers 1, 2, 15 and 16. Five added ground vias and short stubs serve IC1.27 and U2.3. The BQ25792 HOTROD package is not treated as having an invented central ground exposed pad.
plan_priority.py reserves thermal regions before ordinary routing. fanout_six.py repairs tightly pitched charger pin escapes, and polish.py removes redundant vertices using constrained directions and obstacle checks. The accepted plan is thermal-final/candidate-plan.json. Native preflight is in check-04/drc.json; the live replay is independently verified rather than inferred from that preflight.
record_live.py verifies an empty isolated board, replays explicit Electron.run LINE ... +0 and VIA commands through fusion_run_modeling_script, compares native copper after each batch, adds native polygons, then runs Autodesk DRC and exports the replay. The existing Adom activity palette uses sendInfoToHTML; an empty return string on this runtime does not mean the update failed. Native window recordings capture both board and palette. Copy crr.example.py to local crr.py and set FUSION_DEMO_TARGET and ADOM_API to a discovered desktop and its relay. No private relay default is shipped. Document names and board-specific paths in these worked-example scripts must be adapted for a new run.
The first take stopped before geometry changes because of a status-string syntax error. The corrected recorder compiles generated Python before sending it and retains both takes. Recording-02 is the new take. Native recorder time and call timestamps must be reconciled by inspecting footage before editing.
Measurement and scope
measure_thermal.py unions exported bottom fill contours with modeled pads, tracks and vias, subtracts drill voids, and measures components touching the MOSFET thermal-pad copper. It rejects unfilled polygon outlines. Q2 and Q4 share one VBUS region and must not be summed as independent areas. Circular geometry and footprint pad reconstruction are approximations. Floating islands do not count as connected heat spreading. Coverage estimates use the adjacent ablation measurement helper.
The diagnostic copies disable the inherited all-object same-net track-spacing rule, consistently with previous comparisons; different-net rules remain enabled. The reference clearance error signature is 5,1,f10227fd41e0ab5d. Report it explicitly and verify that the replay adds no errors. This is a routing demonstration, not production signoff: sustained currents have not been supplied, temperature has not been measured, and switching-loop, power bottleneck and sensitive-signal qualification remain. The user's 0.1 mm isolation process capability does not establish a voltage rating.
Primary design references: TI BQ25792 layout guidance, CSD17581Q3A datasheet, TLV760 datasheet, and TI clearance and creepage guidance.
Completed replay and delivery
The actual exported CRR replay contains 576 copper segments, 89 vias and eight pours. recording-02/audit.json reports zero off-angle segments at 0.02-degree tolerance and 82.22% estimated total retained copper. Native DRC reports zero airwires, zero warnings and only the unchanged inherited clearance error. Estimated connected bottom regions increase from 11.3 to 29.5 mm² for Q1, 5.3 to 30.3 for Q3, and 13.0 to 25.8 for Q5. Q2 and Q4 share a 45.0 mm² VBUS region, compared with separate 5.3 mm² regions in the previous experiment.
The final narrated video is 223.4 seconds at 1920×1080, H.264/AAC. Full decode passed; measured narration loudness is -16.08 LUFS with -4.27 dBTP peak. Native board and video were delivered to CRR and playback was verified by the actual video content, filename and advancing player position. The public gallery is https://wiki.adom.inc/adom/codex/files/docs/ASTRA-FUSION.md (video 10). Reusable style, thermal planning and recording instructions ship in verified adom/codex 0.1.9; installer idempotence and preservation were checked in an isolated home.
# BQ25792: cleaner routing and connected thermal copper
This experiment preserves Adonis's public BQ25792 Fusion board and the prior routing demonstrations. It calculates a new route plan with horizontal, vertical and 45-degree directions, reserves bottom copper for the MOSFET thermal-pad nets, and replays the accepted geometry in native Fusion on ConfRoomROG (CRR).
The reference has five CSD17581Q3A footprints, each with seven thermal holes. Their pad nets are VAC1 (Q1), VBUS (Q2 and Q4), VAC2 (Q3), and VBAT (Q5). Four higher-priority bottom pours reserve these regions; four lower-priority PGND pours retain remaining copper on the existing layers 1, 2, 15 and 16. Five added ground vias and short stubs serve IC1.27 and U2.3. The BQ25792 HOTROD package is not treated as having an invented central ground exposed pad.
`plan_priority.py` reserves thermal regions before ordinary routing. `fanout_six.py` repairs tightly pitched charger pin escapes, and `polish.py` removes redundant vertices using constrained directions and obstacle checks. The accepted plan is `thermal-final/candidate-plan.json`. Native preflight is in `check-04/drc.json`; the live replay is independently verified rather than inferred from that preflight.
`record_live.py` verifies an empty isolated board, replays explicit `Electron.run LINE ... +0` and `VIA` commands through `fusion_run_modeling_script`, compares native copper after each batch, adds native polygons, then runs Autodesk DRC and exports the replay. The existing Adom activity palette uses `sendInfoToHTML`; an empty return string on this runtime does not mean the update failed. Native window recordings capture both board and palette. Copy `crr.example.py` to local `crr.py` and set `FUSION_DEMO_TARGET` and `ADOM_API` to a discovered desktop and its relay. No private relay default is shipped. Document names and board-specific paths in these worked-example scripts must be adapted for a new run.
The first take stopped before geometry changes because of a status-string syntax error. The corrected recorder compiles generated Python before sending it and retains both takes. Recording-02 is the new take. Native recorder time and call timestamps must be reconciled by inspecting footage before editing.
## Measurement and scope
`measure_thermal.py` unions exported bottom fill contours with modeled pads, tracks and vias, subtracts drill voids, and measures components touching the MOSFET thermal-pad copper. It rejects unfilled polygon outlines. Q2 and Q4 share one VBUS region and must not be summed as independent areas. Circular geometry and footprint pad reconstruction are approximations. Floating islands do not count as connected heat spreading. Coverage estimates use the adjacent ablation measurement helper.
The diagnostic copies disable the inherited all-object same-net track-spacing rule, consistently with previous comparisons; different-net rules remain enabled. The reference clearance error signature is `5,1,f10227fd41e0ab5d`. Report it explicitly and verify that the replay adds no errors. This is a routing demonstration, not production signoff: sustained currents have not been supplied, temperature has not been measured, and switching-loop, power bottleneck and sensitive-signal qualification remain. The user's 0.1 mm isolation process capability does not establish a voltage rating.
Primary design references: [TI BQ25792 layout guidance](https://www.ti.com/lit/gpn/BQ25792), [CSD17581Q3A datasheet](https://www.ti.com/lit/ds/symlink/csd17581q3a.pdf), [TLV760 datasheet](https://www.ti.com/lit/gpn/tlv760), and [TI clearance and creepage guidance](https://www.ti.com/lit/ml/slup421/slup421.pdf).
## Completed replay and delivery
The actual exported CRR replay contains 576 copper segments, 89 vias and eight pours. `recording-02/audit.json` reports zero off-angle segments at 0.02-degree tolerance and 82.22% estimated total retained copper. Native DRC reports zero airwires, zero warnings and only the unchanged inherited clearance error. Estimated connected bottom regions increase from 11.3 to 29.5 mm² for Q1, 5.3 to 30.3 for Q3, and 13.0 to 25.8 for Q5. Q2 and Q4 share a 45.0 mm² VBUS region, compared with separate 5.3 mm² regions in the previous experiment.
The final narrated video is 223.4 seconds at 1920×1080, H.264/AAC. Full decode passed; measured narration loudness is -16.08 LUFS with -4.27 dBTP peak. Native board and video were delivered to CRR and playback was verified by the actual video content, filename and advancing player position. The public gallery is https://wiki.adom.inc/adom/codex/files/docs/ASTRA-FUSION.md (video 10). Reusable style, thermal planning and recording instructions ship in verified `adom/codex` 0.1.9; installer idempotence and preservation were checked in an isolated home.