Fusion - the Fusion 360 Bridge

import json,subprocess
from pathlib import Path
P=Path(__file__).resolve().parent;E=P/'edit';E.mkdir(exist_ok=True)
chapters=[
('intro','Astra expands the heatsinks',"This continues our latest Fusion routing demonstration. The traces already work geometrically. Now Astra looks for copper that can do more useful thermal work. I preserve that board, then expand the heatsinking on a separate copy through Adom Bridge. These are native Fusion edits, with precomputed boundaries.",['Video 10 preserved','576 traces / 89 vias retained','Native Fusion on CRR']),
('VAC1','Q1 / VAC1',"The highlighted region is VAC one, connected to Q one’s drain thermal pad through its seven footprint holes. I expand it toward the board edges and the reserved ground corridor. Connected bottom copper grows from about twenty eight to one hundred seventy three square millimeters.",['VAC1 / Q1 drain','28.1 → 172.8 mm²','Connected bottom copper']),
('VBUS','Q2 + Q4 / VBUS',"Q two and Q four share V bus. This is one thermal region, so I count its area once. It expands from forty five to two hundred six square millimeters. The notch on the left preserves ground copper for the linear regulator instead of giving every available square millimeter to the MOSFETs.",['VBUS / Q2 + Q4 drains','44.6 → 205.6 mm²','Shared region counted once']),
('VAC2','Q3 / VAC2',"This lower left heatsink belongs to VAC two and Q three. Astra expands the connected copper to roughly one hundred fifty two square millimeters. The native refill respects other nets and the board edge. A trial with touching polygon boundaries failed clearance checks; the separated boundaries pass.",['VAC2 / Q3 drain','29.5 → 151.8 mm²','Separated polygon boundaries']),
('VBAT','Q5 / VBAT',"On the right, Q five’s thermal pad is on V bat, not ground. Its region grows from twenty four to two hundred thirty five square millimeters. Existing routes and thermal holes stay in place. Expanding quiet supply copper is different from enlarging the charger’s high speed switching nodes, which I leave unchanged.",['VBAT / Q5 drain','24.4 → 235.4 mm²','SW1 / SW2 unchanged']),
('ground','PGND remains a thermal path',"Ground still matters. The highlighted P ground copper serves the charger and linear regulator, with their existing added thermal vias. Both internal ground pours remain. This is a redistribution of existing copper, not six times more metal on the board. The bottom ground area connected to those thermal vias decreases from nine hundred twenty eight to two hundred seventy five square millimeters.",['PGND / IC1 + U2','Dedicated bottom areas retained','Internal pours unchanged']),
('area','Six times the connected MOSFET area',"Together, the four MOSFET regions grow from one hundred twenty seven to seven hundred sixty six square millimeters. Floating islands do not count as heatsinking. These measurements subtract drill holes; I also corrected a hole-subtraction bug in the earlier helper and recalculated both boards consistently.",['126.7 → 765.7 mm²','6.0× connected area','Drills subtracted / no islands']),
('model','Estimate heat flow, not a power rating',"Here is a first order calculation using the actual copper shapes. The board specifies thirty five micron copper. I hold the bottom source copper at sixty five degrees Celsius, with twenty five degree ambient air, and solve lateral heat conduction plus surface convection and radiation. The four regions shed about fifty five milliwatts before expansion and two hundred eighty three afterward. That is not a junction temperature prediction.",['65°C source / 25°C ambient','35 µm copper / h = 5 W/m²K','Bottom-only estimate']),
('mask','Keep solder mask for this air-cooled option',"Removing solder mask does not automatically improve cooling. Bright copper radiates poorly. In this model, fully masked expanded regions shed two hundred eighty three milliwatts, compared with roughly one hundred fifty for bright exposed copper. A half-exposed approximation also loses ground. Oxidized copper performs similarly to mask, but its surface condition varies. I choose to retain solder mask. A designed thermal interface to a heatsink would require a separate comparison.",['Masked: 0.283 W','Bright exposed: 0.150 W','Chosen: retain solder mask']),
('limits','What the calculation leaves out',"Airflow sensitivity gives about two hundred thirty six to three hundred ninety seven milliwatts for the expanded MOSFET regions. Ground loses some dedicated bottom cooling area. This model omits package resistance, via resistance, other layers, the enclosure, and simultaneous real loads. Use it to compare copper layouts, then measure the assembled board under its actual operating conditions.",['h = 3–10 W/m²K sensitivity','Package / via / enclosure omitted','Real loads still required']),
('final','Native copper, checked and saved',"The actual Fusion replay finishes with zero airwires, zero warnings, and no new D R C errors. The inherited clearance error remains disclosed. Astra calculated the expansion and thermal comparison; Adom Bridge created and inspected the native copper. The saved board, equations, assumptions, and scripts make this experiment reproducible.",['576 segments / 89 vias','12 native pours','0 new errors / 1 inherited'])]
voices=[]
for key,title,speech,lines in chapters:
 f=E/(key+'.txt');f.write_text(speech);audio=E/(key+'.mp3')
 if not audio.exists():subprocess.run(['adom-tts','say','@'+str(f),'--out',str(audio)],check=True,stdout=subprocess.DEVNULL)
 dur=float(subprocess.check_output(['ffprobe','-v','error','-show_entries','format=duration','-of','default=nw=1:nk=1',str(audio)]))
 voices.append({'key':key,'title':title,'speech':speech,'lines':lines,'audio':str(audio),'duration':dur});(E/'voices.json').write_text(json.dumps(voices,indent=2));print(key,round(dur,1),flush=True)