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FUSB3307D6MX

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onsemi USB ICs, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsfusb3307d6mxfactory-2.0.0extractor-text

Verified FUSB3307D6MX

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 14 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: FUSB3307D6MX · SOIC-14 · 14 pins
  • ✓copper: 14 copper pads, none touching another net
  • ✓datasheet: all 14 pin names found in the 22-page datasheet
  • ✓distributor: lcsc C2902252, digikey 488-FUSB3307D6MXTR-ND, mouser 863-FUSB3307D6MX
  • ✓family: SOIC-14_3.9x8.7mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-g3qykn5t/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.21)
  • ✓pads: 14 pins = 14 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 14 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ fusb3307d6mx.kicad_sym✓ fusb3307d6mx.kicad_mod✓ fusb3307d6mx.step
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Ray Publish 0.1.0 6e7ea17 9d ago

FUSB3307D6MX

onsemi · USB ICs · SOIC-14

FUSB3307D6MX from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Power source output voltage monitored by the device and supply for internal bias via VDD; recommended 3.3 V −5% to 21 V +5%, absolute maximum 26 V.
2 GND power_in Ground reference for the device.
3 GATE output Gate drive signal for an N-channel MOSFET VBUS load switch, absolute maximum 30 V.
4 VDD power_out Internal supply voltage regulator output (typically 5.2 V), to be connected to a 1 µF external capacitor.
5 D+/PDIV1 bidirectional D+ connects to USB D+ for BC1.2 or resistor divider mode, or PDIV1 input programs the USB PD power (PDP) value depending on trim option; maximum 6 V.
6 D−/PDIV0 bidirectional D− connects to USB D− for BC1.2 or resistor divider mode, or PDIV0 input programs the PDP value depending on trim option; maximum 6 V.
7 CC1 bidirectional Configuration Channel 1 used to detect USB Type-C devices and communicate over USB PD; protected up to 26 V.
8 CC2 bidirectional Configuration Channel 2 used to detect USB Type-C devices and communicate over USB PD; protected up to 26 V.
9 IS+ input Positive terminal of the current sensing amplifier, connected directly to the positive end of the current sense resistor with a short PCB trace.
10 IS− input Negative terminal of the current sensing amplifier, connected directly to the negative end of the current sense resistor with a short PCB trace.
11 VFB input Output voltage sensing input for constant voltage regulation, tied to the CV loop amplifier non-inverting input via the external 1:10 resistor divider and compensation circuit.
12 IFB input Constant current amplifying signal input; amplified current sense voltage used for external compensation, tied to the non-inverting input of the current loop error amplifier.
13 DISC bidirectional Open-drain discharge pin tied to a small (about 40 Ω) external resistor connected to VBUS after the load switch to discharge VBUS at the connector; maximum 26 V.
14 CATH output Open-drain feedback output controlling the power supply, typically connected to an opto-coupler cathode or a DC-DC regulator compensation/FB node; maximum 26 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Interface ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC, CATH, DISC, CC1, CC2 pin voltage VCC -0.3 26 V 7
GATE pin voltage VGATE -0.3 30 V 7
IFB, VFB, IS+, IS−, NTC, D+/PDIV1, D−/PDIV0, PDIV2 pin voltage VI/O -0.3 6 V 7
VDD pin voltage VDD -0.3 6 V 7
Power dissipation PD 1.5 W TA = 25°C 7
Operating junction temperature TJ -40 150 °C 7
Storage temperature range TSTG -40 150 °C 7
Lead temperature TL 260 °C Soldering, 10 Seconds 7
ESD Human Body Model ESDHBM 2 kV ANSI/ESDA/JEDEC JS−001−2012 7
ESD Charged Device Model ESDCDM 0.5 kV JESD22−C101 7
Output current through load switch IOUT 5 A 7
Ambient temperature TA -40 85 °C Commercial 7
VDD operating voltage at VCC = 20 V VDD 4.75 5.2 5.5 V VCC = 20 V, IVDD = 0 mA 7
Turn−on threshold voltage VCC−ON 2.9 3.2 3.4 V VCC increasing 7
Turn−off threshold voltage VCC−OFF 2.8 2.87 3.1 V VCC decreasing after VCC ≥ VCC−ON 7
Turn−off to turn−on hysteresis VCC−OFF_HYS 100 260 360 mV VCC decreasing after VCC ≥ VCC−ON 7
Standby operating supply current ICC−STBY 0.85 1.1 mA VCC = 5 V, VCS = 0 mV 8
Ratio VCC UVP to VCC KCC−UVP 60 65 70 % VCS = 0 mV 8
UVP debounce time tD−UVP 45 60 75 ms 8
UVP blanking time during a voltage transition tBNK−UVP 160 200 240 ms Whenever a voltage change occurs from lower VBUS to a higher VBUS 8
Ratio VCC OVP to VCC KCC-OVP 116 121 127 % VCS = 0 mV 8
VCC maximum OVP VCC−OVP−MAX 23 23.8 24.8 V 8
OVP debounce time tD−OVP 35 75 110 µs 8
Constant current threshold at IOUT = 1.00 A ICS−1A 0.85 1 1.15 A Constant Current Limit mode and VCC = 5 V, 20 V 8
Constant current threshold at IOUT = 2.00 A ICS−2A 1.85 2 2.15 A Constant Current Limit mode and VCC = 5 V, 20 V 8
Constant current threshold at IOUT = 3.00 A ICS−3A 2.85 3 3.15 A Constant Current Limit mode and VCC = 5 V, 20 V 8
Constant current threshold at IOUT = 4.00 A ICS−4A 3.8 4 4.2 A Constant Current Limit mode and VCC = 5 V, 20 V 8
Constant current threshold at IOUT = 5.00 A ICS−5A 4.75 5 5.25 A Constant Current Limit mode and VCC = 5 V, 20 V 8
Constant current threshold at IOUT = 50 mA ICS−STEP 48 50 52 mA Constant Current Limit mode and VCC = 5 V 8
OCP threshold, 3 A request ICS−3A 3.42 3.6 3.78 A Constant Voltage mode, PD Request Message = 3 A and VCC = 5 V 8
OCP threshold, 5 A request ICS−5A 5.7 6 6.3 A Constant Voltage mode, PD Request Message = 5 A and VCC = 5 V 8
OCP debounce time tOCP−DEB 50 60 70 ms 8
VFB reference voltage at 3.3 V VCVR−3.3V 0.32 0.33 0.34 V VCC = 3.3 V, VCS = 0 V 8
VFB reference voltage at 5.0 V VCVR−5.0V 0.485 0.5 0.515 V VCC = 5.0 V, VCS = 0 V 9
VFB reference voltage at 9 V VCVR−9V 0.873 0.9 0.927 V VCC = 9 V, VCS = 0 V 9
VFB reference voltage at 12 V VCVR−12V 1.164 1.2 1.236 V VCC = 12 V, VCS = 0 V 9
VFB reference voltage at 15 V VCVR−15V 1.455 1.5 1.545 V VCC = 15 V, VCS = 0 V 9
VFB reference voltage at 20 V VCVR−20V 1.94 2 2.06 V VCC = 20 V, VCS = 0 V 9
Duration for disabling load switch when fault removed, normal mode t2S_AR_NM 1.8 2 2.2 sec After fault OVP, UVP, OCP, E_OTP, I_OTP or CC_OVP has recovered 9
PDIV2, PDIV1 and PDIV0 input LOW voltage VIL 0.4 V Input LOW 9
Source current on CC1 pin, 330 µA IP−CC1−330 304 330 356 µA VCC = 5 V, VCC1 = 0 V 10
Source current on CC1 pin, 180 µA IP−CC1−180 166 180 194 µA VCC = 5 V, VCC1 = 0 V 10
Source current on CC2 pin, 330 µA IP−CC2−330 304 330 356 µA VCC = 5 V, VCC2 = 0 V 10
Source current on CC2 pin, 180 µA IP−CC2−180 166 180 194 µA VCC = 5 V, VCC2 = 0 V 10
Ra detection threshold on CC1 VRA−CC1 0.75 0.8 0.85 V VCC = 5 V, VCC2 = 5 V, Decreasing VCC1 10
Ra detection threshold on CC2 VRA−CC2 0.75 0.8 0.85 V VCC = 5 V, VCC1 = 5 V, Decreasing VCC2 10
Rd detection threshold on CC1 VRD−CC1 2.45 2.6 2.75 V VCC = 5 V, VCC2 = 5 V, Decreasing VCC1 10
Rd detection threshold on CC2 VRD−CC2 2.45 2.6 2.75 V VCC = 5 V, VCC1 = 5 V, Decreasing VCC2 10
Sink attach debounce time tCCDebounce 100 150 200 ms VCC = 5 V 10
VCONN OCP debounce time tVCONN_OCP 2.6 3.6 4.7 ms 10
CC1 pin over−voltage protection VCC1−OVP 5.5 5.75 6 V 10
CC2 pin over−voltage protection VCC2−OVP 5.5 5.75 6 V 10
Safe operating voltage at 0 V VSafe0V 0.66 0.73 0.8 V 10
BMC logic high voltage VOH 1.05 1.125 1.2 V IOH = −165 µA or 293 µA 10
BMC logic low voltage VOL 0.075 V IOL = 763 µA 10
BMC transmitter rise time tRise−TX 300 500 700 ns VDD = 4.7 µF 10
BMC transmitter fall time tFall−TX 300 500 700 ns VDD = 4.7 µF 10
Thermal resistance junction−to−air, SOIC14 RθJA 75 °C/W TA=25°C, JEDEC 2S2P board with no thermal vias 7
Thermal reference junction−to−top, SOIC14 RθJT 41.6 °C/W TA=25°C, JEDEC 2S2P board with no thermal vias 7

CAD (KiCad official)

  • Symbol: FUSB3307D6MX
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: fusb3307d6mx-etched.step / fusb3307d6mx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fusb3307d6mx.step / fusb3307d6mx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (22 pp, sha256 e31810e552904a53, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF