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FU6862L

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Fortior Tech Microcontroller Units (MCUs/MPUs/SOCs), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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FU6862L

Fortior Tech · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-48(7x7)

FU6862L from Fortior Tech, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P2.1/CMP2P/AMP2P/AD8/HALL2S bidirectional GPIO (configurable external interrupt 1 input) with CMP2 positive input, AMP2 positive input for phase-current 2 voltage signal, ADC channel 8 input, and HALL2 logic-level input after function remap.
2 P2.2/CMP2M/AMP2M bidirectional GPIO (configurable external interrupt 1 input) with CMP2 negative input and AMP2 negative input.
3 P2.4/AD2 bidirectional GPIO (configurable external interrupt 1 input) with ADC channel 2 input used for bus voltage signal.
4 P2.6/CMP3M/DA0/AD11 bidirectional GPIO (configurable external interrupt 1 input) with overcurrent reference input (CMP3 negative input), internal DAC voltage unbuffered output, and ADC channel 11 input.
5 P2.7/AD4/CMP3P/AMP0O/CMP4M bidirectional GPIO (configurable external interrupt 1 input) with ADC channel 4 input for amplified bus current, CMP3 positive input for overcurrent detection, AMP0 output, and CMP4 negative input.
6 P3.0/AMP0M bidirectional GPIO with AMP0 negative input used to amplify the bus current signal.
7 P3.1/AMP0P bidirectional GPIO with AMP0 positive input used to amplify the bus current signal.
8 P3.3/AD6/RXDS bidirectional GPIO with ADC channel 6 input and, after function remap, UART RXD input in two-wire mode or TXD output/RXD input in single-wire mode.
9 P3.4/AD7/CMP3PS/TXDS bidirectional GPIO with ADC channel 7 input, CMP3 positive input after function remap, and UART TXD output after function remap.
10 P3.5/VREF bidirectional GPIO with ADC external reference voltage input or internal VREF output, with 1 to 4.7 µF external capacitor.
11 P0.1/TIM4/SCL bidirectional GPIO with Timer4 capture-mode input and I2C SCL clock (open-drain output, configurable 5K pull-up).
12 P0.5/TXD/MOSI bidirectional GPIO with UART1 transmit before function remap and SPI MOSI (output in master mode, input in slave mode).
13 P0.6/SCLK/RXD bidirectional GPIO with SPI clock SCLK and UART1 receive before function remap.
14 P0.7/MISO/CMPXO/TIM2S bidirectional GPIO with SPI MISO (input in master mode, output in slave mode), comparator output test pin, and Timer2 capture input or PWM output after remap.
15 VSS power_in Ground.
16 LW output 6N Predriver W-phase low-side PWM output.
17 LV output 6N Predriver V-phase low-side PWM output.
18 LU output 6N Predriver U-phase low-side PWM output.
19 NC unconnected No connect.
20 NC unconnected No connect.
21 VBU power_in 6N Predriver U-phase high-side bootstrap supply.
22 HU output 6N Predriver U-phase high-side PWM output.
23 VSU passive 6N Predriver U-phase input, ground reference for U-phase high-side bootstrap.
24 NC unconnected No connect.
25 NC unconnected No connect.
26 NC unconnected No connect.
27 VSV passive 6N Predriver V-phase input, ground reference for V-phase high-side bootstrap.
28 HV output 6N Predriver V-phase high-side PWM output.
29 VBV power_in 6N Predriver V-phase high-side bootstrap supply.
30 NC unconnected No connect.
31 NC unconnected No connect.
32 NC unconnected No connect.
33 VSW passive 6N Predriver W-phase input, ground reference for W-phase high-side bootstrap.
34 HW output 6N Predriver W-phase high-side PWM output.
35 VBW power_in 6N Predriver W-phase high-side bootstrap supply.
36 NC unconnected No connect.
37 NC unconnected No connect.
38 VCC power_in Power input in single-supply high-voltage mode, 12 to 20 V with VDD5 generated by the internal LDO, with external 10 µF or larger filter capacitor.
39 VSS power_in Ground.
40 VDD5 power_in Medium-voltage supply input or internal 5 V LDO output (5 V when VCC > 5.5 V), with 1 to 4.7 µF capacitor.
41 RSTN/FICEK input External reset input with internal pull-up and Schmitt input, also FICE debug interface clock.
42 VDD18 power_out 1.85 V LDO output supply with 1 to 4.7 µF external capacitor.
43 P1.2/FICED bidirectional GPIO (configurable external interrupt 1 input) and FICE debug data port.
44 P1.3/HBIAS/CMP1PS bidirectional GPIO with HALL bias supply (internally switched to VDD5) and CMP1 positive input after function remap.
45 P1.4/CMP0P/AD10/HALL0S bidirectional GPIO (configurable external interrupt 1 input) with CMP0 positive input, ADC channel 10 input, and HALL0 logic-level input after remap.
46 P1.5/CMP0M bidirectional GPIO (configurable external interrupt 1 input) with CMP0 negative input.
47 P1.6/CMP1P/AMP1P/AD9/HALL1S bidirectional GPIO (configurable external interrupt 1 input) with CMP1 positive input, AMP1 positive input for phase-current 1 voltage signal, ADC channel 9 input, and HALL1 logic-level input after remap.
48 P1.7/CMP1M/AMP1M bidirectional GPIO with CMP1 negative input and AMP1 negative input.

Key specifications

Parameter Value
Manufacturer Fortior Tech
Package LQFP-48(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 48

CAD (KiCad official)

  • Symbol: FU6862L
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: fu6862l-etched.step / fu6862l-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fu6862l.step / fu6862l.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Fortior Tech datasheet (411 pp, sha256 05a4e9038bde6635, retrieved 2026-10-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF