component
FU6812P
Public Made by Adomby adom
Fortior Tech New Arrivals, LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFU6812P
Fortior Tech · New Arrivals · LQFP-32(7x7)
FU6812P from Fortior Tech, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P2.1/CMP2P/AMP2P/AD8/HALL2S | bidirectional | GPIO P2.1 with configurable external interrupt 1 input and configurable 5K pull-up; BEMF2 positive input, op-amp 2 positive input (phase current 2), ADC channel 8 input, and remapped HALL2 logic input. |
| 2 | P2.2/CMP2M/AMP2M | bidirectional | GPIO P2.2 with configurable external interrupt 1 input and configurable 5K pull-up; BEMF2 negative input and op-amp 2 negative input. |
| 3 | P2.3/AD1/AMP2O/CMP4P | bidirectional | GPIO P2.3 with configurable external interrupt 1 input; ADC channel 1 input for amplified phase current 2, op-amp 2 output, and comparator 4 positive input. |
| 4 | P2.4/AD2 | bidirectional | GPIO P2.4 with configurable external interrupt 1 input; ADC channel 2 input for the bus voltage signal. |
| 5 | P2.7/AD4/CMP3P/AMP0O/CMP4M | bidirectional | GPIO P2.7 with configurable external interrupt 1 input; ADC channel 4 input for amplified bus current, comparator 3 positive input for overcurrent detection, op-amp 0 output, and comparator 4 negative input. |
| 6 | P3.0/AMP0M | bidirectional | GPIO P3.0 or op-amp 0 negative input used to amplify the bus current signal. |
| 7 | P3.1/AMP0P | bidirectional | GPIO P3.1 or op-amp 0 positive input used to amplify the bus current signal. |
| 8 | P3.2/AD5/VHALF | bidirectional | GPIO P3.2 used as over-temperature signal input (ADC channel 5), or 1/2 VDD5 or 1/2 VREF reference output with external 1uF capacitor. |
| 9 | P3.4/AD7/TXDS | bidirectional | GPIO P3.4 used as analog speed control input (ADC channel 7), or UART data transmit after function remap. |
| 10 | IOVCC | power_in | IO supply input 3 |
| 11 | P0.1/TIM4/SCL | bidirectional | GPIO P0.1, Timer4 capture mode input, or I2C SCL clock (open-drain output) with configurable 5K pull-up. |
| 12 | P0.5/TXD/MOSI | bidirectional | GPIO P0.5, UART1 data transmit before function remap, or SPI MOSI (master output/slave input). |
| 13 | P0.6/RXD/SCLK | bidirectional | GPIO P0.6, UART1 data receive before function remap, or SPI clock SCLK. |
| 14 | P0.7/MISO/CMPXO/TIM2S/P1.1/TIM3 | bidirectional | GPIO P0.7 with SPI MISO, comparator output test pin and remapped Timer2 capture input/PWM output, shared with GPIO P1.1 (configurable external interrupt 1 input) and Timer3 capture input. |
| 15 | L_DU | output | PWM U-phase low-side PWM output. |
| 16 | L_DV | output | PWM V-phase low-side PWM output. |
| 17 | L_DW | output | PWM W-phase low-side PWM output. |
| 18 | H_DU | output | PWM U-phase high-side PWM output. |
| 19 | H_DV | output | PWM V-phase high-side PWM output. |
| 20 | H_DW | output | PWM W-phase high-side PWM output. |
| 21 | VCC | power_in | Power supply input whose voltage range is set by the supply mode, with an external 10uF or larger filter capacitor. |
| 22 | VSS | power_in | Digital ground. |
| 23 | VDD5 | power_in | Medium-voltage supply input or internal 5V LDO output, with external 1~4.7uF capacitor. |
| 24 | RSTN/FICEK | input | External reset input with internal pull-up and Schmitt input; also FICE debug interface clock. |
| 25 | VDD18 | power_out | 1.8V LDO output supply with external 1~4.7uF capacitor. |
| 26 | P1.2/FICED | bidirectional | GPIO P1.2 with configurable external interrupt 1 input; FICE data port. |
| 27 | P1.3/HBIAS/CMP1PS | bidirectional | GPIO P1.3, HALL bias supply connected internally to VDD5 through a switch, and comparator 1 second-mode positive input. |
| 28 | P1.4/CMP0P/AD10/HALL0S | bidirectional | GPIO P1.4 with configurable external interrupt 1 input and 5K pull-up; BEMF0 positive input, ADC channel 10 input, and remapped HALL0 logic input. |
| 29 | P1.5/CMP0M | bidirectional | GPIO P1.5 with configurable external interrupt 1 input and 5K pull-up; BEMF0 negative input. |
| 30 | P1.6/CMP1P/AMP1P/AD9/HALL1S | bidirectional | GPIO P1.6 with configurable external interrupt 1 input and 5K pull-up; BEMF1 positive input, op-amp 1 positive input (phase current 1), ADC channel 9 input, and remapped HALL1 logic input. |
| 31 | P1.7/CMP1M/AMP1M | bidirectional | GPIO P1.7 with configurable 5K pull-up; BEMF1 negative input and op-amp 1 negative input. |
| 32 | P2.0/AD0/AMP1O | bidirectional | GPIO P2.0 with configurable external interrupt 1 input; ADC channel 0 input for amplified phase current 1 and op-amp 1 output. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Fortior Tech |
| Package | LQFP-32(7x7) |
| Category | Others |
| Pins | 32 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient temperature, operating | TA | -40 | 85 | ℃ | 60 | ||
| Ambient temperature, operating | TA | -40 | 105 | ℃ | VCC≤12V, Ivcc≤30mA | 60 | |
| Junction temperature, operating | TJ | -40 | 150 | ℃ | 60 | ||
| Storage temperature | -65 | 150 | ℃ | 60 | |||
| VCC voltage relative to VSS | VCC | -0.3 | 36 | V | 60 | ||
| VDD5/IOVCC voltage relative to VSS | VDD5/IOVCC | -0.3 | 5 | 6.5 | V | 60 | |
| VDD18 voltage | VDD18 | -0.3 | 1.85 | 2 | V | 60 | |
| VCC operating voltage, single supply high voltage mode | VCC | 5 | 24 | V | VCC_MODE=0 | 60 | |
| VCC operating voltage, dual supply high voltage mode | VCC | 5 | 36 | V | VCC_MODE=1, VCC≥VDD5 | 60 | |
| VCC operating voltage, single supply low voltage mode | VCC | 3 | 5.5 | V | VCC_MODE=1, VCC connected to VDD5 | 60 | |
| VDD5 operating voltage | VDD5 | 3 | 5.5 | V | VCC_MODE=1, VCC connected to VDD5 | 61 | |
| IOVCC operating voltage | IOVCC | 3 | V | 61 | |||
| IVCC sleep current | IVCC | 100 | 250 | uA | VCC_MODE=0 | 61 | |
| IVCC sleep current | IVCC | 45 | 100 | uA | VCC_MODE=1, VCC=VDD5=5V | 61 | |
| GPIO output low voltage | VOL | 0.7 | V | IOL=8mA, IOVCC=VDD5=5V | 62 | ||
| Operational amplifier input common-mode range | VICMR | 0 | V | 63 | |||
| Op-amp unity-gain bandwidth | UGBW | 6 | 10 | MHz | CL=40pF | 64 | |
| Op-amp slew rate | SR | 10 | 15 | V/uS | CL=40pF | 64 | |
| BEMF built-in resistor | 5.4 | 6.8 | 8.2 | kΩ | 64 | ||
| Internal fast clock frequency | 23.5 | 24 | 24.5 | MHz | TA=-40℃ |
64 | |
| WDT clock frequency | 29 | 32.8 | 37 | kHz | TA=-40℃ |
64 | |
| Reset low-level minimum width | 25 | 50 | uS | TA=-40℃ |
64 | ||
| VDD5 voltage (LDO) | VDD5 | 4.7 | 5 | 5.3 | V | VCC = 7V～30V, VCC_MODE=0 | 64 |
| System clock | 24 | MHz | 61 | ||||
| IVCC operating current | IVCC | 24 | mA | varies with program settings | 61 | ||
| IVCC standby current | IVCC | 6 | mA | varies with program settings | 61 | ||
| GPIO output rise time | 15 | nS | 50pF Load, 10% to 90%, TA=25℃ | 62 | |||
| GPIO output fall time | 13 | nS | 50pF Load, 90% to 10%, TA=25℃ | 62 | |||
| GPIO pull-up resistance (other GPIO) | 33 | kΩ | Vin=0V, except P0[2:0], P1[6:3], P2[1], P3[7:6] | 62 | |||
| GPIO pull-up resistance P0[2:0], P1[6:3], P2[1], P3[7:6] | 5 | kΩ | Vin=0V | 62 | |||
| PWM IO output source current | 50 | mA | HDIO=1 | 62 | |||
| PWM IO output sink current | 100 | mA | HDIO=1 | 62 | |||
| PWM IO output rise time | 7 | nS | 50pF Load, 10% to 90%, TA=25℃ | 62 | |||
| PWM IO output fall time | 5 | nS | 50pF Load, 90% to 10%, TA=25℃ | 62 | |||
| ADC INL | INL | 2 | LSB | 63 | |||
| ADC DNL | DNL | 1.5 | LSB | 63 | |||
| ADC offset | OFFSET | 10 | LSB | 63 | |||
| ADC input resistance | RIN | 500 | Ω | 63 | |||
| ADC input capacitance | CIN | 30 | pF | 63 | |||
| ADC conversion time | 0.6 | uS | 63 | ||||
| Op-amp offset voltage | VOS | 5 | mV | 63 | |||
| Op-amp open-loop gain | AOL | 80 | dB | RL=100kΩ | 64 | ||
| VDD18 voltage (LDO) | VDD18 | 1.85 | V | 64 |
CAD (KiCad official)
- Symbol:
FU6812P - Footprint:
Package_QFP:LQFP-32_7x7mm_P0.8mm - 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
fu6812p-etched.step/fu6812p-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fu6812p.step/fu6812p.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Fortior Tech datasheet (289 pp, sha256
d5f447c6f6bd72fd, retrieved 2026-10-26, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).