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FTX30P35G

ARK micro · MOSFETs · SOT-89

FTX30P35G from ARK micro, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate, with a gate-to-source voltage limit of ±20 V and a gate threshold voltage of -1 V to -3 V at ID=-250µA.
2 D passive Drain (also the tab), rated for -350 V drain-to-source voltage and -0.2 A continuous drain current.
3 S passive Source terminal of the P-channel MOSFET, with a maximum on-resistance of 30 Ω at VGS=-10 V and ID=-200 mA.

Key specifications

Parameter Value
Manufacturer ARK micro
Package SOT-89
Category Triode/MOS Tube/Transistor
Pins 3

CAD (KiCad official)

  • Symbol: FTX30P35G
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89 (KiCad packages3D, STEP)
  • 3D model files: ftx30p35g-etched.step / ftx30p35g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ftx30p35g.step / ftx30p35g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ARK micro datasheet (5 pp, sha256 f10947ea320844ee, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF