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FT93C66A-UTR-T

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FMD Fremont Micro Devices EEPROM, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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FT93C66A-UTR-T

FMD Fremont Micro Devices · EEPROM · TSSOP-8

FT93C66A-UTR-T from FMD Fremont Micro Devices, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip Select input of the serial EEPROM; a rising edge starts each instruction and it must be held low at least 250 ns (tCS) before being raised to read READY/BUSY status on DO.
2 SCL input Serial Clock input whose rising edge latches data into the EEPROM and clocks data out of it.
3 DI input Serial Data Input carrying the start bit, op-code, address and data bits into the device.
4 DO tri_state Serial Data Output that shifts out read data and indicates READY/BUSY status during programming when CS is raised, going high impedance when CS is low.
5 GND power_in Ground.
6 ORG input Internal Organization input: connected to VCC or left unconnected selects x16 (internally recognized as VIH), connected to ground selects x8 organization (512 x 8 for FT93C66).
7 DC unconnected Don't Connect pin that should be left unconnected.
8 VCC power_in Power supply; 1.8V to 5.5V for the FT93C66A variant.

Key specifications

Parameter Value
Manufacturer FMD Fremont Micro Devices
Package TSSOP-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC1 1.8 5.5 V 10
Industrial operating temperature -40 85 °C 2
Input voltage on any pin relative to ground (lower limit) -0.3 V relative to ground 2
Maximum voltage 8 V 2
Storage temperature -50 125 °C 2
Supply Current, READ ICC 0.5 2 mA VCC = 5.0V, READ at 1.0 MHz 10
Supply Current, WRITE ICC 0.5 2 mA VCC = 5.0V, WRITE at 1.0 MHz 10
Standby Current ISB1 0.1 µA VCC = 1.8V, CS = 0V 10
Standby Current ISB2 1.5 µA VCC = 2.5V, CS = 0V 10
Input Leakage IIL 0.1 1 µA Vin = 0V to VCC 10
Output Leakage IOL 0.1 1 µA Vin = 0V to VCC 10
Input Low Voltage VIL1 -0.6 0.8 V 4.5V ≤VCC ≤ 5.5V 10
Input High Voltage VIH1 2 V 4.5V ≤VCC ≤ 5.5V 10
Input Low Voltage VIL2 -0.6 V 1.8V ≤VCC≤ 2.7V 10
Output Low Voltage VOL1 0.4 V IOL = 2.1 mA 10
Output High Voltage VOH1 2.4 V 4.5V ≤VCC≤ 5.5V IOH = -0.4 mA 10
Output Low Voltage VOL12 0.2 V IOL = 0.15 mA 10
SCL Clock Frequency fSCL 0 2 MHz 4.5V ≤ VCC ≤ 5.5V 9
SCL Clock Frequency fSCL 0 1 MHz 2.7V ≤ VCC ≤ 5.5V 9
SCL Clock Frequency fSCL 0 0.25 MHz 1.8V ≤ VCC ≤ 5.5V 9
SCL High Time tSCLH 250 ns 4.5V ≤ VCC ≤ 5.5V 9
SCL High Time tSCLH 1000 ns 1.8V ≤ VCC ≤ 5.5V 9
SCL Low Time tSCLL 250 ns 4.5V ≤ VCC ≤ 5.5V 9
SCL Low Time tSCLL 1000 ns 1.8V ≤ VCC ≤ 5.5V 9
Minimum CS Low Time tCS 250 ns 4.5V ≤ VCC ≤ 5.5V 9
Minimum CS Low Time tCS 1000 ns 1.8V ≤ VCC ≤ 5.5V 9
CS Setup Time Relative to SCL tCSS 50 ns 4.5V ≤ VCC ≤ 5.5V 9
CS Setup Time Relative to SCL tCSS 200 ns 1.8V ≤ VCC ≤ 5.5V 9
DI Setup Time Relative to SCL tDIS 100 ns 4.5V ≤ VCC ≤ 5.5V 9
DI Setup Time Relative to SCL tDIS 400 ns 1.8V ≤ VCC ≤ 5.5V 9
CS Hold Time Relative to SCL tCSH 0 ns 9
DI Hold Time Relative to SCL tDIH 100 ns 4.5V ≤ VCC ≤ 5.5V 9
DI Hold Time Relative to SCL tDIH 400 ns 1.8V ≤ VCC ≤ 5.5V 9
Output Delay to '1' tPD1 250 ns 4.5V ≤ VCC ≤ 5.5V, AC test 9
Output Delay to '1' tPD1 1000 ns 1.8V ≤ VCC ≤ 5.5V, AC test 9
Output Delay to '0' tPD0 250 ns 4.5V ≤ VCC ≤ 5.5V, AC test 9
Output Delay to '0' tPD0 1000 ns 1.8V ≤ VCC ≤ 5.5V, AC test 9
CS to Status Valid tSV 250 ns 4.5V ≤ VCC ≤ 5.5V, AC test 9
CS to Status Valid tSV 1000 ns 1.8V ≤ VCC ≤ 5.5V, AC test 9
CS to DO in High Impedance tDF 100 ns 4.5V ≤ VCC ≤ 5.5V, CS = VIL, AC test 9
CS to DO in High Impedance tDF 400 ns 1.8V ≤ VCC ≤ 5.5V, CS = VIL, AC test 9
Write Cycle Time tWC 3 10 ms 4.5V ≤ VCC ≤ 5.5V 9

CAD (KiCad official)

  • Symbol: FT93C66A-UTR-T
  • Footprint: Package_SO:TSSOP-8_3x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: ft93c66a-utr-t-etched.step / ft93c66a-utr-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ft93c66a-utr-t.step / ft93c66a-utr-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: FMD Fremont Micro Devices datasheet (24 pp, sha256 65559b4f3db0bd20, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF