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FT800Q-R

Public Made by Adom

by adom

Bridgetek Video Interface ICs, VQFN-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentcommunication interface chip-uart-485-232ft800q-rfactory-2.0.0extractor-text

Verified FT800Q-R

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier lcsc, 49 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: FT800Q-R · VQFN-48(7x7) · 49 pins
  • ✓copper: 49 copper pads, none touching another net
  • ✓datasheet: all 49 pin names found in the 46-page datasheet
  • ✓distributor: lcsc C3824106, digikey 768-1185-2-ND, mouser 895-FT800Q-R
  • ✓family: QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-ndcz7j72/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 49 pins = 49 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 49 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ft800q-r.kicad_sym✓ ft800q-r.kicad_mod✓ ft800q-r.step
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3D Model

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Symbol & Footprint

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Contents

README

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FT800Q-R

Bridgetek · Video Interface ICs · VQFN-48(7x7)

FT800Q-R from Bridgetek, in a VQFN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AUDIO_L output Audio PWM push-pull output, 16mA sink/source current, pad powered from VCC.
2 GND power_in Ground.
3 SPI_SCLK/I2C_SCL input SPI SCLK input in SPI mode or I2C SCL input needing 1kΩ~4.7kΩ pull-up to VCCIO; Schmitt trigger, 3.3V tolerant, powered from VCCIO.
4 MISO/I2C_SDA bidirectional SPI MISO output or I2C SDA input/open-drain output needing 1kΩ~4.7kΩ pull-up to VCCIO; Schmitt trigger, 3.3V tolerant, 4/8/12/16mA drive, powered from VCCIO.
5 MOSI/I2C_SA0 input SPI MOSI input or bit 0 of I2C device address; 3.3V tolerant, powered from VCCIO.
6 CS_N/I2C_SA1 input Active-low SPI CS_N input or bit 1 of I2C device address; 3.3V tolerant, powered from VCCIO.
7 GPIO0/I2C_SA2 bidirectional General purpose I/O in SPI mode or bit 2 of I2C device address; push-pull three-state, 3.3V tolerant, 4/8/12/16mA drive, powered from VCCIO.
8 GPIO1 bidirectional General purpose I/O, push-pull three-state, 3.3V tolerant, 4/8/12/16mA drive, powered from VCCIO.
9 VCCIO power_in I/O power supply supporting 1.8V, 2.5V or 3.3V with 0.1uF decoupling capacitor; supplies IO pads of pins 3 to 12 only.
10 MODE input Host interface mode select, pull low for SPI or pull up for I2C; 3.3V tolerant, powered from VCCIO.
11 INT_N output Active-low host interrupt open-drain output, pull up to VCCIO through 1kΩ~10kΩ resistor.
12 PD_N input Active-low power down input, 3.3V tolerant, pull up to VCCIO through 47kΩ with 100nF to ground.
13 X1/CLK input Crystal oscillator or clock input, connect to GND if not used; 3.3V peak input allowed, powered from VCC.
14 X2 output Crystal oscillator output, leave open if not used; powered from VCC.
15 GND power_in Ground.
16 VCC power_in 3.3V power supply input.
17 VCC1V2 power_out 1.2V regulator output, connect a 4.7uF decoupling capacitor to GND.
18 VCC power_in 3.3V power supply input.
19 X+ bidirectional Analog I/O connecting to X right electrode of 4-wire touch-screen panel, powered from VCC.
20 Y+ bidirectional Analog I/O connecting to Y top electrode of 4-wire touch-screen panel, powered from VCC.
21 X- bidirectional Analog I/O connecting to X left electrode of 4-wire touch-screen panel, powered from VCC.
22 Y- bidirectional Analog I/O connecting to Y bottom electrode of 4-wire touch-screen panel, powered from VCC.
23 GND power_in Ground.
24 BACKLIGHT output LED backlight brightness PWM control push-pull output, 4/8mA sink/source current, powered from VCC.
25 DE output LCD Data Enable push-pull output, 4/8mA sink/source current, powered from VCC.
26 VSYNC output LCD vertical sync push-pull output, 4/8mA sink/source current, powered from VCC.
27 HSYNC output LCD horizontal sync push-pull output, 4/8mA sink/source current, powered from VCC.
28 DISP output General purpose LCD display enable output controlled by bit 7 of REG_GPIO, push-pull, 4/8mA drive, powered from VCC.
29 PCLK output LCD pixel clock push-pull output, 4/8mA sink/source current, powered from VCC.
30 B7 output Blue bit 7 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
31 B6 output Blue bit 6 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
32 B5 output Blue bit 5 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
33 B4 output Blue bit 4 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
34 B3 output Blue bit 3 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
35 B2 output Blue bit 2 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
36 GND power_in Ground.
37 G7 output Green bit 7 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
38 G6 output Green bit 6 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
39 G5 output Green bit 5 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
40 G4 output Green bit 4 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
41 G3 output Green bit 3 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
42 G2 output Green bit 2 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
43 R7 output Red bit 7 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
44 R6 output Red bit 6 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
45 R5 output Red bit 5 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
46 R4 output Red bit 4 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
47 R3 output Red bit 3 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
48 R2 output Red bit 2 RGB push-pull output, 4/8mA sink/source current, powered from VCC.
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Bridgetek
Package VQFN-48(7x7)
Category Communication Interface Chip/UART/485/232
Pins 49

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCCIO operating supply voltage VCCIO 1.62 1.8 1.98 V Normal Operation 33
VCCIO operating supply voltage VCCIO 2.25 2.5 2.75 V Normal Operation 33
VCCIO operating supply voltage VCCIO 2.97 3.3 3.63 V Normal Operation 33
VCC operating supply voltage VCC 2.97 3.3 3.63 V Normal Operation 33
Output Voltage High (3.3V) Voh 2.4 V Ioh=4mA 33
Output Voltage Low (3.3V) Vol 0.4 V Iol=4mA 33
Input High Voltage (3.3V) Vih 2 V 33
Input Low Voltage (3.3V) Vil 0.8 V 33
Schmitt Hysteresis Voltage (3.3V) Vth 0.3 0.45 0.5 V 33
Input leakage current (3.3V) Iin -10 10 uA Vin = VCCIO or 0 33
Tristate output leakage current (3.3V) Ioz -10 10 uA Vin = VCCIO or 0 33
Schmitt Hysteresis Voltage (2.5V) Vth 0.28 0.39 0.5 V VCCIO = +2.5V 34
Schmitt Hysteresis Voltage (1.8V) Vth 0.25 0.35 0.5 V VCCIO = +1.8V 34
Input leakage current (2.5V/1.8V) Iin -10 10 uA Vin = VCCIO or 0 34
Touch drive on resistance Rsw-on 5 10 Ω 34
Touch Detection rising-edge threshold Vth+ 1.53 1.7 1.87 V 34
Touch Detection falling-edge threshold Vth- 1.17 1.3 -1.47 V 34
Touch Detection Hysteresis Vhys 0.36 0.39 0.4 V 34
X/Y axis drive load resistance Rl 200 Ω 34
Power Down current Icc1 1 µA Power down mode 33
Sleep current Icc2 250 µA Sleep Mode 33
Standby current Icc3 1.5 mA Standby Mode 33
Operating current Icc4 24 mA Normal Operation 33
Regulator Output voltage VCC1V2 1.2 V Normal Operation 33
ADC Resolution 10 bits VCC=3.3V 34
Integral Nonlinearity 1 LSB VCC=3.3V; +/-1 typical 34
Differential Nonlinearity 0.5 LSB VCC=3.3V; +/-0.5 typical 34
Offset Error 2 LSB VCC=3.3V; +/-2 typical 34
Crystal frequency 12 MHz 35
Crystal X1/X2 capacitance 5 10 pF 35
External clock duty cycle 45 50 55 % 35
External clock input voltage on X1/CLKIN 3.3 Vp-p 35
SPI Clock frequency Fsclk 0 30 Mhz VCC(I/O)=3.3V 35
SPI clock period Tsclk 33 ns VCC(I/O)=3.3V 35
Input Setup Tisu 5 ns VCC(I/O)=3.3V 35
Input Hold Tih 10 ns VCC(I/O)=3.3V 35
CSN hold time Tcsnh 15 ns VCC(I/O)=3.3V 36
Pixel Clock period Tpclk 78 104 ns VCC=3.3V 36
Pixel Clock duty cycle Tpclkdc 40 60 % VCC=3.3V 36
DATA setup Tdsu 20 ns VCC=3.3V 36
DATA hold Tdhd 10 ns VCC=3.3V 36
Storage Temperature -65 150 °C 33
Ambient Temperature (Power Applied) -40 85 °C 33
VCC Supply Voltage VCC 0 4 V 33
VCCIO Supply Voltage VCCIO 0 4 V 33
DC Input Voltage -0.5 V max is VCCIO + 0.3 33
Operating temperature range -40 85 °C Ambient Temperature 33

CAD (KiCad official)

  • Symbol: FT800Q-R
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: VQFN-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: ft800q-r-etched.step / ft800q-r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ft800q-r.step / ft800q-r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Bridgetek datasheet (46 pp, sha256 6ba98d5228f44309, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF