component
FT62F086E-TRB
Public Made by Adomby adom
FMD Fremont Micro Devices Microcontrollers (MCU/MPU/SOC), TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 9d ago |
| viewers | 9d ago |
| ft62f086e-trb-etched.glb | 9d ago |
| ft62f086e-trb-etched.step | 9d ago |
| ft62f086e-trb-hero.glb | 9d ago |
| ft62f086e-trb-hero.overlay.json | 9d ago |
| ft62f086e-trb.glb | 9d ago |
| ft62f086e-trb.kicad_mod | 9d ago |
| ft62f086e-trb.kicad_sym | 9d ago |
| ft62f086e-trb.lbr | 9d ago |
| ft62f086e-trb.step | 9d ago |
| package.json | 9d ago |
| page.json | 9d ago |
| README.md | 9d ago |
FT62F086E-TRB
FMD Fremont Micro Devices · Microcontrollers (MCU/MPU/SOC) · TSSOP-24
FT62F086E-TRB from FMD Fremont Micro Devices, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin of the MCU, listed as pin 1 for the 24-pin package in Table 1-1. |
| 2 | SPI_NSS/TIM2_CH3/VREFP/PB5 | bidirectional | GPIO PB5 with digital input/output and pull-up/pull-down, also usable as SPI slave select NSS, Timer2 channel 3 PWM7 output, or the ADC positive reference VREFP. |
| 3 | TIM1_CH3/KEY9/PB4 | bidirectional | GPIO PB4 with digital input/output and pull-up/pull-down, also usable as Timer1 channel 3 PWM output or touch key KEY9. |
| 4 | TIM1_BKIN/I2C_SDA/KEY11/PB3 | bidirectional | GPIO PB3 with digital input/output and pull-up/pull-down, also usable as the Timer1 break input BKIN, I2C data line SDA (open-drain when enabled), or touch key KEY11. |
| 5 | [ADC_ETR]/I2C_SCL/KEY12/PB2 | bidirectional | GPIO PB2 with digital input/output and pull-up/pull-down, also usable as the remapped ADC external trigger, I2C clock SCL (open-drain when enabled), or touch key KEY12. |
| 6 | TIM1_ETR/KEY13/PC4 | bidirectional | GPIO PC4 with digital input/output and pull-up/pull-down, also usable as the Timer1 external trigger input TIM1_ETR or touch key KEY13. |
| 7 | [TIM1_CH3N]/KEY14/PC5 | bidirectional | GPIO PC5 with digital input/output and pull-up/pull-down, also usable as the remapped Timer1 channel 3 complementary output or touch key KEY14. |
| 8 | [TIM1_CH2N]/KEY15/PC6 | bidirectional | GPIO PC6 with digital input/output and pull-up/pull-down, also usable as the remapped Timer1 channel 2 complementary output or touch key KEY15. |
| 9 | [USART_CK]/[TIM1_CH1]/PD1 | bidirectional | GPIO PD1 with digital input/output and pull-up/pull-down, also usable as the remapped USART clock USART_CK or Timer1 channel 1 output. |
| 10 | [TIM1_CH2]/PD2 | bidirectional | GPIO PD2 with digital input/output and pull-up/pull-down, also usable as the remapped Timer1 channel 2 output. |
| 11 | [SPI_SCK]/[TIM1_CH3]/PD3 | bidirectional | GPIO PD3 with digital input/output and pull-up/pull-down, also usable as the remapped SPI clock SCK or Timer1 channel 3 output. |
| 12 | CLKO/TIM1_CH4/AN7/PB1 | bidirectional | GPIO PB1 with digital input/output and pull-up/pull-down, also usable as the clock output CLKO, Timer1 channel 4 PWM output, or ADC input AN7. |
| 13 | PB0/SPI_SCK/TIM1_CH3N/[TIM2_CH1] | bidirectional | GPIO PB0 with digital input/output and pull-up/pull-down, also usable as SPI clock SCK, Timer1 channel 3 complementary output, or the remapped Timer2 channel 1 output. |
| 14 | PA0/SPI_MOSI/TIM1_CH1 | bidirectional | GPIO PA0 with digital input/output and pull-up/pull-down, also usable as SPI data output MOSI (open-drain when enabled) or Timer1 channel 1 output. |
| 15 | PA1/SPI_MISO/TIM1_CH2 | bidirectional | GPIO PA1 with digital input/output and pull-up/pull-down, also usable as SPI data input MISO (open-drain when enabled) or Timer1 channel 2 output. |
| 16 | PA2/ISPCLK/[I2C_SCL]/[USART_RX] | bidirectional | GPIO PA2 with digital input/output and pull-up/pull-down, also used as the ISP debug clock ISPCLK and, when remapped, I2C_SCL or USART_RX. |
| 17 | PA4/KEY1/AN5/TIM2_CH2/ADC_ETR | bidirectional | GPIO PA4 with digital input/output and pull-up/pull-down, also usable as ADC input AN5, ADC external trigger, Timer2 channel 2 PWM6 output, or touch key KEY1. |
| 18 | PA6/KEY3/AN4/USART_TX | bidirectional | GPIO PA6 with digital input/output and pull-up/pull-down, also usable as ADC input AN4, USART transmit USART_TX (open-drain when enabled), or touch key KEY3. |
| 19 | PA7/KEY4/AN3/USART_RX/ELVD0 | bidirectional | GPIO PA7 with digital input/output and pull-up/pull-down, also usable as ADC input AN3, USART receive USART_RX, LVD external input ELVD0, or touch key KEY4. |
| 20 | PC0/KEY6/AN2/ELVD1/MCLRB/TIM1_CH1N | bidirectional | GPIO PC0 that can be configured as the external reset input /MCLRB (weak pull-up enabled automatically), also usable as ADC input AN2, LVD input ELVD1, Timer1 channel 1 complementary output, or touch key KEY6. |
| 21 | PC1 | bidirectional | GPIO PC1 that can be configured as the OSC1 crystal or external clock input, also usable as ADC input AN1, SPI_MISO, LVD input ELVD2, or touch key KEY7. |
| 22 | PB7 | bidirectional | GPIO PB7 that can be configured as the OSC2 crystal output in XT/LP mode, also usable as ADC input AN0, SPI_MOSI, LVD input ELVD3, or touch key KEY8. |
| 23 | PB6/VREFN/ISPDAT/[USART_TX]/[I2C_SDA] | bidirectional | GPIO PB6 with digital input/output, also usable as the ADC negative reference VREFN, ISP data line ISPDAT, or remapped USART_TX or I2C_SDA. |
| 24 | VDD | power_in | Positive supply pin; the datasheet gives the operating range as VPOR to 5.5 V and 16 MHz operation at 1T requires VDD of at least 2.7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | FMD Fremont Micro Devices |
| Package | TSSOP-24 |
| Category | Embedded Processors & Controllers |
| Pins | 24 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating temperature grade 3 | -40 | 85 | °C | 238 | |||
| Operating temperature grade 2 | -40 | 105 | °C | 238 | |||
| Operating temperature grade 1 | -40 | 125 | °C | 238 | |||
| Storage temperature | -40 | 125 | °C | 238 | |||
| Power supply voltage (referenced to VSS) | -0.3 | 6 | V | 238 | |||
| Port input voltage (min referenced to VSS; max is VDD+0.3 V, not numeric) | -0.3 | V | 238 | ||||
| System clock frequency Fsys (1T/2T/4T) | Fsys | 8 | MHz | -40 |
238 | ||
| System clock frequency Fsys (1T/2T/4T) | Fsys | 16 | MHz | -40 |
238 | ||
| External reset pulse width | TMCLRB | 2000 | ns | 25°C | 238 | ||
| LVR threshold level 1 | VLVR | 1.94 | 2 | 2.06 | V | 25°C | 239 |
| LVR threshold level 2 | VLVR | 2.13 | 2.2 | 2.27 | V | 25°C | 239 |
| LVR threshold level 3 | VLVR | 2.42 | 2.5 | 2.58 | V | 25°C | 239 |
| LVR threshold level 4 | VLVR | 2.72 | 2.8 | 2.88 | V | 25°C | 239 |
| LVR threshold level 5 | VLVR | 3.01 | 3.1 | 3.19 | V | 25°C | 239 |
| LVR threshold level 6 | VLVR | 3.49 | 3.6 | 3.71 | V | 25°C | 239 |
| LVR threshold level 7 | VLVR | 3.98 | 4.1 | 4.22 | V | 25°C | 239 |
| LVR delay | 94 | 125 | μs | 25°C, VDD = 2.5V | 239 | ||
| LVD threshold level 1 | VLVD | 1.94 | 2 | 2.06 | V | 25°C | 239 |
| LVD threshold level 2 | VLVD | 2.33 | 2.4 | 2.47 | V | 25°C | 239 |
| LVD threshold level 3 | VLVD | 2.72 | 2.8 | 2.88 | V | 25°C | 239 |
| LVD threshold level 4 | VLVD | 2.91 | 3 | 3.09 | V | 25°C | 239 |
| LVD threshold level 5 | VLVD | 3.49 | 3.6 | 3.71 | V | 25°C | 239 |
| LVD threshold level 6 | VLVD | 3.88 | 4 | 4.12 | V | 25°C | 239 |
| LVD delay | 94 | 125 | μs | 25°C, VDD = 2.5V | 239 |
CAD (KiCad official)
- Symbol:
FT62F086E-TRB - Footprint:
Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm - 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files:
ft62f086e-trb-etched.step/ft62f086e-trb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ft62f086e-trb.step/ft62f086e-trb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: FMD Fremont Micro Devices datasheet (261 pp, sha256
ad4677e75f599cba, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).