component

FT60F122

Public Made by Adom

by adom

FMD Fremont Micro Devices Microcontrollers (MCU/MPU/SOC), SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersft60f122factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers ft60f122: viewers · Ray 8d ago
ft60f122-etched.glb Publish 0.1.0 · Ray 8d ago
ft60f122-etched.step ft60f122: factory component page (tier=lcsc) · Ray 8d ago
ft60f122-hero.glb ft60f122: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
ft60f122-hero.overlay.json Publish 0.1.0 · Ray 8d ago
ft60f122.glb Publish 0.1.0 · Ray 8d ago
ft60f122.kicad_mod Publish 0.1.0 · Ray 8d ago
ft60f122.kicad_sym Publish 0.1.0 · Ray 8d ago
ft60f122.lbr Publish 0.1.0 · Ray 8d ago
ft60f122.step Publish 0.1.0 · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago

FT60F122

FMD Fremont Micro Devices · Microcontrollers (MCU/MPU/SOC) · SOP-14

FT60F122 from FMD Fremont Micro Devices, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive power supply input; the device operates from 1.9V to 5.5V (2.7V to 5.5V at FSYS = 16MHz).
2 OSC1/CLKI/PA7 bidirectional Crystal/resonator OSC1 pin, external clock input (CLKI) or PORTA I/O PA7 with interrupt-on-change.
3 OSC2/CLKO/PA6 bidirectional Crystal/resonator OSC2 pin, instruction clock output (CLKO, mapped to PC5 on version E chips) or PORTA I/O PA6 with interrupt-on-change.
4 [P1B]/ELVD/MCLRB/PA5 bidirectional Remappable PWM1B second output, external LVD analog input (must not exceed VDD), external reset input MCLRB with weak pull-up to VDD, or PORTA I/O PA5 with interrupt-on-change.
5 P1B/PA4 bidirectional PWM1B default output or PORTA I/O PA4 with interrupt-on-change.
6 P1A0/PC5 bidirectional PWM1A0 output or PORTC I/O PC5.
7 P1A0N/PC4 bidirectional PWM1A0N complementary output or PORTC I/O PC4.
8 PC1/[P1A2] bidirectional PORTC I/O PC1 or remappable PWM1A2 output.
9 PC0/[P1A2N] bidirectional PORTC I/O PC0 or remappable PWM1A2N complementary output.
10 PA3/P1C bidirectional PORTA I/O PA3 with interrupt-on-change or PWM1C default output.
11 PA2/T0CKI/INT/[P1C]/BK0 bidirectional PORTA I/O PA2 with interrupt-on-change, Timer0 external clock input, external interrupt input, PWM1C second output, or PWM brake input BK0.
12 PA1/ICSPDAT bidirectional PORTA I/O PA1 with interrupt-on-change or programming/debug data pin.
13 PA0/ICSPCLK bidirectional PORTA I/O PA0 with interrupt-on-change or programming/debug clock input.
14 GND power_in Negative power supply input (ground).

Key specifications

Parameter Value
Manufacturer FMD Fremont Micro Devices
Package SOP-14
Category Embedded Processors & Controllers
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating temperature -40 85 °C 88
Storage temperature -40 125 °C 88
Supply voltage (VSS-0.3V to VSS+6.0V) -0.3 6 V referenced to VSS 88
Port input voltage (VSS-0.3V to VDD+0.3V) -0.3 0.3 V min referenced to VSS, max referenced to VDD 88
Supply voltage, FSYS = 8MHz VDD 1.9 5.5 V FSYS = 8MHz 1
Supply voltage, FSYS = 16MHz VDD 2.7 5.5 V FSYS = 16MHz 1
HIRC calibration range 15.76 16 16.24 MHz 25°C, VDD = 2.5V 88
HIRC variation over temperature -4 4 % -40~85°C, VDD = 2.5V 88
HIRC variation over supply voltage -1 1.5 % 25°C, VDD = 1.9~5.5V 88
LIRC oscillation frequency (32kHz mode) 30.4 32 33.6 kHz 25°C, VDD = 2.5V 88
LIRC variation over temperature -2 2 % -40 ~ 85°C, VDD = 2.5V 88
LIRC variation over supply voltage -3.5 1 % 25°C, VDD = 1.9~5.5V 88
VLVR, LVR threshold (2.0V level) VLVR 1.94 2 2.06 V 25°C 89
VLVR, LVR threshold (2.2V level) VLVR 2.13 2.2 2.27 V 25°C 89
VLVR, LVR threshold (2.5V level) VLVR 2.42 2.5 2.58 V 25°C 89
VLVR, LVR threshold (2.8V level) VLVR 2.72 2.8 2.88 V 25°C 89
VLVR, LVR threshold (3.1V level) VLVR 3.01 3.1 3.19 V 25°C 89
VLVR, LVR threshold (3.6V level) VLVR 3.49 3.6 3.71 V 25°C 89
VLVR, LVR threshold (4.1V level) VLVR 3.98 4.1 4.22 V 25°C 89
LVR delay 125 157 μs 25°C , VDD = 1.9~5.5V 89
VLVD, LVD threshold (2.0V level) VLVD 1.94 2 2.06 V 25°C 89
VLVD, LVD threshold (2.4V level) VLVD 2.33 2.4 2.47 V 25°C 89
VLVD, LVD threshold (2.8V level) VLVD 2.72 2.8 2.88 V 25°C 89
VLVD, LVD threshold (3.0V level) VLVD 2.91 3 3.09 V 25°C 89
VLVD, LVD threshold (3.6V level) VLVD 3.49 3.6 3.71 V 25°C 89
VLVD, LVD threshold (4.0V level) VLVD 3.88 4 4.12 V 25°C 89
LVD delay 125 157 μs 25°C , VDD = 1.9~5.5V 89

CAD (KiCad official)

  • Symbol: FT60F122
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: ft60f122-etched.step / ft60f122-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ft60f122.step / ft60f122.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: FMD Fremont Micro Devices datasheet (105 pp, sha256 9f8acb80b8551ef5, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF