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FT60F121
Public Made by Adomby adom
FMD Fremont Micro Devices Microcontrollers (MCU/MPU/SOC), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFT60F121
FMD Fremont Micro Devices · Microcontrollers (MCU/MPU/SOC) · SOP-8
FT60F121 from FMD Fremont Micro Devices, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply input; the device operates from 1.9V to 5.5V. |
| 2 | PA5 | bidirectional | PORTA IO with interrupt-on-change that is also MCLRB external reset input (weak pull-up), ELVD external LVD analog input (must not exceed VDD) and remapped P1B (second mapping) PWM output. |
| 3 | PA4 | bidirectional | PORTA IO with interrupt-on-change that is also the default P1B PWM1B output. |
| 4 | PC5 | bidirectional | PORTC IO that is also the P1A0 PWM output (and CLKO on version E chips). |
| 5 | PA2 | bidirectional | PORTA IO with interrupt-on-change that is also BK0 PWM brake input, T0CKI Timer0 external clock input, INT external interrupt input and remapped P1C output. |
| 6 | PA1 | bidirectional | PORTA IO with interrupt-on-change that is also the ICSPDAT programming/debug data pin. |
| 7 | PA0 | bidirectional | PORTA IO with interrupt-on-change that is also the ICSPCLK programming/debug clock pin. |
| 8 | GND | power_in | Negative supply input (ground). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | FMD Fremont Micro Devices |
| Package | SOP-8 |
| Category | Embedded Processors & Controllers |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| HIRC calibration range | 15.76 | 16 | 16.24 | MHz | 25°C, VDD = 2.5V | 88 | |
| HIRC variation over temperature | -4 | 4 | % | -40~85°C, VDD = 2.5V | 88 | ||
| HIRC variation over supply voltage | -1 | 1.5 | % | 25°C, VDD = 1.9~5.5V | 88 | ||
| LIRC oscillation frequency | 30.4 | 32 | 33.6 | kHz | 25°C, VDD = 2.5V | 88 | |
| LIRC variation over temperature | -2 | 2 | % | -40 ~ 85°C, VDD = 2.5V | 88 | ||
| LIRC variation over supply voltage | -3.5 | 1 | % | 25°C, VDD = 1.9~5.5V | 88 | ||
| LVR threshold | VLVR | 1.94 | 2 | 2.06 | V | 25°C | 89 |
| LVR threshold | VLVR | 2.13 | 2.2 | 2.27 | V | 25°C | 89 |
| LVR threshold | VLVR | 2.42 | 2.5 | 2.58 | V | 25°C | 89 |
| LVR threshold | VLVR | 2.72 | 2.8 | 2.88 | V | 25°C | 89 |
| LVR threshold | VLVR | 3.01 | 3.1 | 3.19 | V | 25°C | 89 |
| LVR threshold | VLVR | 3.49 | 3.6 | 3.71 | V | 25°C | 89 |
| LVR threshold | VLVR | 3.98 | 4.1 | 4.22 | V | 25°C | 89 |
| LVR delay | 125 | 157 | μs | 25°C, VDD = 1.9~5.5V | 89 | ||
| LVD threshold | VLVD | 1.94 | 2 | 2.06 | V | 25°C | 89 |
| LVD threshold | VLVD | 2.33 | 2.4 | 2.47 | V | 25°C | 89 |
| LVD threshold | VLVD | 2.72 | 2.8 | 2.88 | V | 25°C | 89 |
| LVD threshold | VLVD | 2.91 | 3 | 3.09 | V | 25°C | 89 |
| LVD threshold | VLVD | 3.49 | 3.6 | 3.71 | V | 25°C | 89 |
| LVD threshold | VLVD | 3.88 | 4 | 4.12 | V | 25°C | 89 |
| LVD delay | 125 | 157 | μs | 25°C, VDD = 1.9~5.5V | 89 | ||
| Operating temperature (absolute maximum) | -40 | 85 | °C | 88 | |||
| Storage temperature (absolute maximum) | -40 | 125 | °C | 88 | |||
| Supply voltage (absolute maximum) | -0.3 | 6 | V | Referenced to VSS (VSS -0.3V to VSS + 6.0V) | 88 | ||
| Port input voltage (absolute maximum) | -0.3 | V | Referenced to VSS (minimum); maximum printed as VDD + 0.3V | 88 | |||
| Wide operating supply voltage | 1.9 | 5.5 | V | 1 | |||
| Operating supply voltage at FSYS = 8MHz | 1.9 | 5.5 | V | FSYS = 8MHz | 1 | ||
| Operating supply voltage at FSYS = 16MHz | 2.7 | 5.5 | V | FSYS = 16MHz | 1 | ||
| Industrial operating temperature range | -40 | 85 | °C | Industrial grade | 1 | ||
| Maximum system clock frequency | 16 | MHz | 1 | ||||
| Crystal oscillator and external clock input frequency | 20 | MHz | Crystal oscillator and external clock input | 1 |
CAD (KiCad official)
- Symbol:
FT60F121 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
ft60f121-etched.step/ft60f121-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ft60f121.step/ft60f121.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: FMD Fremont Micro Devices datasheet (105 pp, sha256
9f8acb80b8551ef5, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).