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FT24C64A-TSR-T

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by adom

FMD Fremont Micro Devices EEPROM, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs ft24c64a-tsr-t: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers ft24c64a-tsr-t: viewers · Ray 1mo ago
ft24c64a-tsr-t-etched.fit.json ft24c64a-tsr-t: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ft24c64a-tsr-t-etched.glb ft24c64a-tsr-t: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ft24c64a-tsr-t-etched.step ft24c64a-tsr-t: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ft24c64a-tsr-t.glb Publish 0.1.0 · Ray 1mo ago
ft24c64a-tsr-t.kicad_mod Publish 0.1.0 · Ray 1mo ago
ft24c64a-tsr-t.kicad_sym Publish 0.1.0 · Ray 1mo ago
ft24c64a-tsr-t.lbr Publish 0.1.0 · Ray 1mo ago
ft24c64a-tsr-t.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 12d ago
README.md ft24c64a-tsr-t: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 18d ago

FT24C64A-TSR-T

FMD Fremont Micro Devices · EEPROM · SOP-8

FT24C64A-TSR-T from FMD Fremont Micro Devices, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Device/chip select address input bit 0. Hardwired to VIH or VIL to set one of the three lower bits of the I2C slave address (compared against bits 5-7 of the device address byte). Internally biased to VIL if left unconnected.
2 A1 input Device/chip select address input bit 1. Hardwired to VIH or VIL to set the I2C slave address. Internally recognized as VIL if left unconnected.
3 A2 input Device/chip select address input bit 2. Hardwired to VIH or VIL to set the I2C slave address. Internally recognized as VIL if left unconnected.
4 GND power_in Ground / device return. 0 V reference for VCC and all logic signals.
5 SDA bidirectional Serial data line for the two-wire (I2C-compatible) interface. Open-drain output; requires an external pull-up resistor to VCC (typ. 1.3 kΩ to 10 kΩ). Can be wire-OR'd with other open-drain devices on the same bus.
6 SCL input Serial clock input for the two-wire interface. Rising edge latches SDA data into the device; falling edge clocks data out. Schmitt-trigger, filtered input; requires an external pull-up to VCC.
7 WP input Write Protect input. Tie to GND (VIL) or leave unconnected to allow programming of the whole EEPROM array; tie to VIH/VCC to hardware-lock all write operations. Read operations are unaffected by WP.
8 VCC power_in Supply voltage, 1.7 V to 5.5 V. Must ramp monotonically at 0.1 V/ms to 50 V/ms during power-up. Decouple with a capacitor no smaller than 10 nF close to the pin.

Key specifications

Parameter Value
Manufacturer FMD Fremont Micro Devices
Package SOP-8
Category Memory
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • FT24C64A-TSR-B
  • FT24C64A-TSR-T
  • FT24C64A-TSR-TTSG-B
  • FT24C64A-TSR-TTSG-T
  • FT24C64A-TSR-TTDR-B
  • FT24C64A-TSR-TTDG-B
  • FT24C64A-TSR-TTMR-B
  • FT24C64A-TSR-TTMR-T
  • FT24C64A-TSR-TTMG-B
  • FT24C64A-TSR-TTMG-T
  • FT24C64A-TSR-TTTR-B
  • FT24C64A-TSR-TTTR-T
  • FT24C64A-TSR-TTTG-B
  • FT24C64A-TSR-TTTG-T
  • FT24C64A-TSR-TTNR-T
  • FT24C64A-TSR-TTNG-T
  • FT24C64A-TSR-TTLR-T
  • FT24C64A-TSR-TTLG-T
  • FT24C64A-TSR-TTPR-T
  • FT24C64A-TSR-TTPG-T

CAD (KiCad official)

  • Symbol: FT24C64A-TSR-T
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: ft24c64a-tsr-t-etched.step / ft24c64a-tsr-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ft24c64a-tsr-t.step / ft24c64a-tsr-t.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ft24c64a-tsr-t.step 122 KB You want the bare part, or you mark your own boards.
ft24c64a-tsr-t-etched.step 2.2 MB You want the part with FT24C64A-TSR-T already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 570 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: FMD Fremont Micro Devices datasheet (19 pp, sha256 bf9133cdc0303281, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF