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ft24c64a-tsr-t: factory component page (tier=lcsc)

Ray ·6f6f8d8149 ·1mo ago ·parent 4eec13d
1 file changed +116−8
page.json+116−8
@@ -1,13 +1,126 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "ft24c64a-tsr-t",+  "title": "FT24C64A-TSR-T",+  "brief": "FMD Fremont Micro Devices EEPROM, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "FMD Fremont Micro Devices EEPROM, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "memory",     "ft24c64a-tsr-t"   ],+  "component": {+    "mpn": "FT24C64A-TSR-T",+    "manufacturer": "FMD Fremont Micro Devices",+    "package": "SOP-8",+    "pin_count": 8,+    "category": "Memory",+    "subcategory": "EEPROM",+    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2404021726_FMD-Fremont-Micro-Devices-FT24C64A-TSR-T_C7434830.pdf",+    "parts": {+      "symbol": "ft24c64a-tsr-t.kicad_sym",+      "footprint": "ft24c64a-tsr-t.kicad_mod",+      "model_3d": "ft24c64a-tsr-t.glb",+      "model_3d_step": "ft24c64a-tsr-t.step",+      "lbr": "ft24c64a-tsr-t.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "A0",+        "type": "input",+        "description": "Device/chip select address input bit 0. Hardwired to VIH or VIL to set one of the three lower bits of the I2C slave address (compared against bits 5-7 of the device address byte). Internally biased to VIL if left unconnected."+      },+      {+        "number": "2",+        "name": "A1",+        "type": "input",+        "description": "Device/chip select address input bit 1. Hardwired to VIH or VIL to set the I2C slave address. Internally recognized as VIL if left unconnected."+      },+      {+        "number": "3",+        "name": "A2",+        "type": "input",+        "description": "Device/chip select address input bit 2. Hardwired to VIH or VIL to set the I2C slave address. Internally recognized as VIL if left unconnected."+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Ground / device return. 0 V reference for VCC and all logic signals."+      },+      {+        "number": "5",+        "name": "SDA",+        "type": "bidirectional",+        "description": "Serial data line for the two-wire (I2C-compatible) interface. Open-drain output; requires an external pull-up resistor to VCC (typ. 1.3 k\u03a9 to 10 k\u03a9). Can be wire-OR'd with other open-drain devices on the same bus."+      },+      {+        "number": "6",+        "name": "SCL",+        "type": "input",+        "description": "Serial clock input for the two-wire interface. Rising edge latches SDA data into the device; falling edge clocks data out. Schmitt-trigger, filtered input; requires an external pull-up to VCC."+      },+      {+        "number": "7",+        "name": "WP",+        "type": "input",+        "description": "Write Protect input. Tie to GND (VIL) or leave unconnected to allow programming of the whole EEPROM array; tie to VIH/VCC to hardware-lock all write operations. Read operations are unaffected by WP."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Supply voltage, 1.7 V to 5.5 V. Must ramp monotonically at 0.1 V/ms to 50 V/ms during power-up. Decouple with a capacitor no smaller than 10 nF close to the pin."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2404021726_FMD-Fremont-Micro-Devices-FT24C64A-TSR-T_C7434830.pdf",+        "pages": 19,+        "sha256": "bf9133cdc0303281",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "FMD Fremont Micro Devices",+      "Package": "SOP-8",+      "Category": "Memory",+      "Pins": "8"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "ft24c64a-tsr-t"+  ],+  "discovery_pitch": "FT24C64A-TSR-T (FMD Fremont Micro Devices) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +138,5 @@     "docs/ft24c64a-tsr-t-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file