FT240XS-R from FTDI, in a SSOP-24-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	D4	bidirectional	FIFO data bus bit 4; when used in input mode it is pulled to VCCIO through an internal 200kΩ resistor.
2	D2	bidirectional	FIFO data bus bit 2; when used in input mode it is pulled to VCCIO through an internal 200kΩ resistor.
3	VCCIO	power_in	1V8 to 3V3 supply for the IO cells.
4	D1	bidirectional	FIFO data bus bit 1; when used in input mode it is pulled to VCCIO through an internal 200kΩ resistor.
5	D7	bidirectional	FIFO data bus bit 7; when used in input mode it is pulled to VCCIO through an internal 200kΩ resistor.
6	GND	power_in	Device ground supply pin.
7	D5	bidirectional	FIFO data bus bit 5; when used in input mode it is pulled to VCCIO through an internal 200kΩ resistor.
8	D6	bidirectional	FIFO data bus bit 6; when used in input mode it is pulled to VCCIO through an internal 200kΩ resistor.
9	D3	bidirectional	FIFO data bus bit 3; when used in input mode it is pulled to VCCIO through an internal 200kΩ resistor.
10	SIWU#	input	Active low input used to flush the IC buffer back to the PC (Send Immediate) or as a wake-up signal when the PC is in suspend mode.
11	RD#	input	Enables the current FIFO data byte on D0...D7 when low, and fetches the next byte from the receive FIFO buffer when RD# goes from high to low.
12	WR	input	Writes the data byte on D0...D7 into the transmit FIFO buffer when WR goes from high to low.
13	USBDP	bidirectional	USB Data Signal Plus, incorporating a 1.5kΩ pull-up resistor to 3.3V.
14	USBDM	bidirectional	USB Data Signal Minus.
15	3V3OUT	power_out	3V3 output at 50mA that may be used to power VCCIO; when VCC is 3V3 this pin is an input and must be connected to pin 18.
16	RESET#	input	Active low reset input that can be driven by an external device to reset the FT240X; if not required it can be left unconnected or pulled up to VCC.
17	VCORE	power_out	+1V8 output that may be left unterminated.
18	VCC	power_in	+5V (or 3V3) supply to the device core; if VCC is 3V3, 3V3OUT must also be driven with a 3V3 input.
19	GND	power_in	Device ground supply pin.
20	TXE#	output	When high do not write data into the FIFO; when low, data can be written by strobing WR high then low; tristate during reset.
21	RXF#	output	When low, data is available to read by strobing RD# low then high; tristate during reset, and becomes an input for USB remote wake-up during suspend if that option is enabled.
22	CBUS6	bidirectional	Configurable CBUS I/O pin whose function is set in the internal MTP memory (see CBUS Signal Options, Table 3.9).
23	CBUS5	bidirectional	Configurable CBUS I/O pin whose function is set in the internal MTP memory (see CBUS Signal Options, Table 3.9).
24	D0	bidirectional	FIFO data bus bit 0; when used in input mode it is pulled to VCCIO through an internal 200kΩ resistor.

Key specifications

Parameter	Value
Manufacturer	FTDI
Package	SSOP-24-150mil
Category	Interface ICs
Pins	24

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Storage Temperature		-65		150	°C		16
Ambient Operating Temperature (Power Applied)		-40		85	°C		16
VCC Supply Voltage		-0.3		5.5	V		16
VCCIO IO Voltage		-0.3		4	V		16
DC Input Voltage, USBDP and USBDM		-0.5		3.63	V		16
DC Input Voltage, High Impedance Bi-directional (powered from VCCIO)		-0.3		5.8	V		16
DC Output Current, Outputs				22	mA		16
VCC Operating Supply Voltage	VCC	2.97	5	5.5	V	Normal Operation	17
VCCIO Operating Supply Voltage	VCCIO	1.62		3.63	V		17
Operating Supply Current	Icc1	8	8	8.4	mA	Normal Operation	17
3.3V regulator output	3V3	2.97	3.3	3.63	V	VCC must be greater than 3V3; otherwise 3V3OUT is an input driven with 3.3V	17
Frequency of Operation (internal clock)		11.98	12	12.02	MHz		21
Clock Period (internal clock)		83.19	83.33	83.47	ns		21
Duty Cycle (internal clock)		45	50	55	%		21
Output Voltage Low (FIFO I/O, VCCIO = +3.3V)	Vol	0		0.4	V	VCCIO = +3.3V; Iol = +/-2mA; I/O Drive strength = 4mA	18
Input low Switching Threshold (FIFO I/O)	Vil			0.8	V	VCCIO = +3.3V; LVTTL	18
Input High Switching Threshold (FIFO I/O)	Vih	2			V	VCCIO = +3.3V; LVTTL	18
Input pull-up resistance (FIFO I/O)	Rpu	40	75	190	KΩ	VCCIO = +3.3V; Vin = 0	18
Input pull-down resistance (FIFO I/O)	Rpd	40	75	190	KΩ	VCCIO = +3.3V; Vin = VCCIO	18
Input Leakage Current (FIFO I/O)	Iin	-10	1	10	μA	VCCIO = +3.3V; Vin = 0	18
Tri-state output leakage current (FIFO I/O)	Ioz	-10	1	10	μA	VCCIO = +3.3V; Vin = 5.5V or 0	18
Output Voltage Low (FIFO I/O, VCCIO = +2.5V)	Vol	0		0.4	V	VCCIO = +2.5V; Iol = +/-2mA; I/O Drive strength = 4mA	19
Input low Switching Threshold (FIFO I/O)	Vil			0.8	V	VCCIO = +2.5V; LVTTL	19
Input High Switching Threshold (FIFO I/O)	Vih	0.8			V	VCCIO = +2.5V; LVTTL	19
Input pull-up resistance (FIFO I/O)	Rpu	40	75	190	KΩ	VCCIO = +2.5V; Vin = 0	19
Input pull-down resistance (FIFO I/O)	Rpd	40	75	190	KΩ	VCCIO = +2.5V; Vin = VCCIO	19
Input Leakage Current (FIFO I/O)	Iin	-10	1	10	μA	VCCIO = +2.5V; Vin = 0	19
Tri-state output leakage current (FIFO I/O)	Ioz	-10	1	10	μA	VCCIO = +2.5V; Vin = 5.5V or 0	19
Input low Switching Threshold (FIFO I/O)	Vil			0.77	V	VCCIO = +1.8V; LVTTL	20
Input High Switching Threshold (FIFO I/O)	Vih	1.6			V	VCCIO = +1.8V; LVTTL	20
Input pull-up resistance (FIFO I/O)	Rpu	40	75	190	KΩ	VCCIO = +1.8V; Vin = 0	20
Input pull-down resistance (FIFO I/O)	Rpd	40	75	190	KΩ	VCCIO = +1.8V; Vin = VCCIO	20
Input Leakage Current (FIFO I/O)	Iin	-10	1	10	μA	VCCIO = +1.8V; Vin = 0	20
Tristate output leakage current (FIFO I/O)	Ioz	-10	1	10	μA	VCCIO = +1.8V; Vin = 5.5V or 0	20
USB I/O Output Voltage Low (USBDP, USBDM)	Vol			0.2	V		20
USB I/O Input low Switching Threshold (USBDP, USBDM)	Vil			0.8	V		20
USB I/O Input High Switching Threshold (USBDP, USBDM)	Vih	2			V		20
Operating Supply Current	Icc2		125		μA	USB Suspend	17

CAD (KiCad official)

Symbol: FT240XS-R
Footprint: Package_SO:SSOP-24_3.9x8.7mm_P0.635mm
3D model: SSOP-24-150mil (KiCad packages3D, STEP)
3D model files: ft240xs-r-etched.step / ft240xs-r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ft240xs-r.step / ft240xs-r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: FTDI datasheet (41 pp, sha256 5765a1e6b849401b, retrieved 2026-11-06, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

FT240XS-R

Verified FT240XS-R

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README