component
FT2232HQ-REEL
Public Made by Adomby adom
FTDI USB Converters, QFN-64-EP(9x9). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFT2232HQ-REEL
FTDI · USB Converters · QFN-64-EP(9x9)
FT2232HQ-REEL from FTDI, in a QFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground input, 0V reference. |
| 2 | OSCI | input | Oscillator input for 12 MHz crystal; input voltage 2.97-3.63V. |
| 3 | OSCO | output | Oscillator output for 12 MHz crystal connection. |
| 4 | VPHY | power_in | 3.3V internal USB PHY power supply input; must not connect directly to USB supply, requires 3.3V regulator with recommended LC filter. |
| 5 | GND | power_in | Ground input, 0V reference. |
| 6 | REF | input | Current reference input; connect via 12kΩ resistor at 1% tolerance to GND. |
| 7 | DM | bidirectional | USB Data Signal Minus; differential pair signal for USB 2.0 high-speed/full-speed/low-speed operation. |
| 8 | DP | bidirectional | USB Data Signal Plus; differential pair signal for USB 2.0 high-speed/full-speed/low-speed operation. |
| 9 | VPLL | power_in | 3.3V internal PHY PLL power supply input; recommended filtering with LC filter. |
| 10 | AGND | power_in | Analog ground, 0V reference. |
| 11 | GND | power_in | Ground input, 0V reference. |
| 12 | VCORE | power_in | 1.8V core supply voltage input (1.62-1.98V); powers internal chip logic. |
| 13 | TEST | input | IC test pin; for normal operation should be connected to GND. |
| 14 | RESET# | input | Reset input, active low; external device can reset the FT2232H; should be tied to VCCIO if not used. |
| 15 | GND | power_in | Ground input, 0V reference. |
| 16 | ADBUS0 | bidirectional | Channel A data/control bus bit 0; functions include TXD (RS232), D0 (FIFO), TCK/SK (MPSSE), or AD0 (Host Bus Emulation) depending on configuration. |
| 17 | ADBUS1 | bidirectional | Channel A data/control bus bit 1; functions include RXD (RS232), D1 (FIFO), TDI/DO (MPSSE), or AD1 (Host Bus Emulation) depending on configuration. |
| 18 | ADBUS2 | bidirectional | Channel A data/control bus bit 2; functions include RTS# (RS232), D2 (FIFO), TDO/DI (MPSSE), or AD2 (Host Bus Emulation) depending on configuration. |
| 19 | ADBUS3 | bidirectional | Channel A data/control bus bit 3; functions include CTS# (RS232), D3 (FIFO), TMS/CS (MPSSE), or AD3 (Host Bus Emulation) depending on configuration. |
| 20 | VCCIO | power_in | 3.3V I/O interface power supply input (2.97-3.63V); 5V tolerant; failure to connect all VCCIO pins results in device failure. |
| 21 | ADBUS4 | bidirectional | Channel A data/control bus bit 4; functions include DTR# (RS232), D4 (FIFO), GPIOL0 (MPSSE), or AD4 (Host Bus Emulation) depending on configuration. |
| 22 | ADBUS5 | bidirectional | Channel A data/control bus bit 5; functions include DSR# (RS232), D5 (FIFO), GPIOL1 (MPSSE), or AD5 (Host Bus Emulation) depending on configuration. |
| 23 | ADBUS6 | bidirectional | Channel A data/control bus bit 6; functions include DCD# (RS232), D6 (FIFO), GPIOL2 (MPSSE), or AD6 (Host Bus Emulation) depending on configuration. |
| 24 | ADBUS7 | bidirectional | Channel A data/control bus bit 7; functions include RI# (RS232), D7 (FIFO), GPIOL3 (MPSSE), or AD7 (Host Bus Emulation) depending on configuration. |
| 25 | GND | power_in | Ground input, 0V reference. |
| 26 | ACBUS0 | bidirectional | Channel A control bus bit 0; functions include TXDEN (RS232), RXF# (FIFO), GPIOH0 (MPSSE), or CS# (Host Bus Emulation) depending on configuration. |
| 27 | ACBUS1 | tri_state | Channel A control bus bit 1; defaults to tri-stated input with internal 75kΩ pull-up to VCCIO; functions include TXE# (FIFO), WRSTB# (Bit-bang), GPIOH1 (MPSSE), or A0 (Host Bus Emulation) depending on configuration. |
| 28 | ACBUS2 | tri_state | Channel A control bus bit 2; defaults to tri-stated input with internal 75kΩ pull-up to VCCIO; functions include RD# (FIFO), RDSTB# (Bit-bang), GPIOH2 (MPSSE), or RD# (Host Bus Emulation) depending on configuration. |
| 29 | ACBUS3 | bidirectional | Channel A control bus bit 3; functions include RXLED# (RS232), WR# (FIFO), GPIOH3 (MPSSE), or WR# (Host Bus Emulation) depending on configuration. |
| 30 | ACBUS4 | input | Channel A control bus bit 4; functions include TXLED# (RS232), SIWUA (FIFO/Bit-bang), or GPIOH4 (MPSSE) depending on configuration. |
| 31 | VCCIO | power_in | 3.3V I/O interface power supply input (2.97-3.63V); 5V tolerant; failure to connect all VCCIO pins results in device failure. |
| 32 | ACBUS5 | tri_state | Channel A control bus bit 5; defaults to tri-stated input with internal 75kΩ pull-up to VCCIO; functions include CLKOUT (FIFO), GPIOH5 (MPSSE), or A13 (Host Bus Emulation) depending on configuration. |
| 33 | ACBUS6 | tri_state | Channel A control bus bit 6; defaults to tri-stated input with internal 75kΩ pull-up to VCCIO; functions include OE# (FIFO), GPIOH6 (MPSSE), or A14 (Host Bus Emulation) depending on configuration. |
| 34 | ACBUS7 | bidirectional | Channel A control bus bit 7; functions include GPIOH7 (MPSSE) or A15 (Host Bus Emulation) depending on configuration. |
| 35 | GND | power_in | Ground input, 0V reference. |
| 36 | SUSPEND# | output | Active low output signal indicating when USB interface is in suspend mode. |
| 37 | VCORE | power_in | 1.8V core supply voltage input (1.62-1.98V); powers internal chip logic. |
| 38 | BDBUS0 | bidirectional | Channel B data/control bus bit 0; functions include TXD (RS232), D0 (FIFO), TCK/SK (MPSSE), FSDI (Fast Serial), or CS# (Host Bus Emulation) depending on configuration. |
| 39 | BDBUS1 | bidirectional | Channel B data/control bus bit 1; functions include RXD (RS232), D1 (FIFO), TDI/DO (MPSSE), FSCLK (Fast Serial), or ALE (Host Bus Emulation) depending on configuration. |
| 40 | BDBUS2 | bidirectional | Channel B data/control bus bit 2; functions include RTS# (RS232), D2 (FIFO), TDO/DI (MPSSE), FSDO (Fast Serial), or RD# (Host Bus Emulation) depending on configuration. |
| 41 | BDBUS3 | bidirectional | Channel B data/control bus bit 3; functions include CTS# (RS232), D3 (FIFO), TMS/CS (MPSSE), FSCTS (Fast Serial), or WR# (Host Bus Emulation) depending on configuration. |
| 42 | VCCIO | power_in | 3.3V I/O interface power supply input (2.97-3.63V); 5V tolerant; failure to connect all VCCIO pins results in device failure. |
| 43 | BDBUS4 | bidirectional | Channel B data/control bus bit 4; functions include DTR# (RS232), D4 (FIFO), GPIOL0 (MPSSE), or IORDY (Host Bus Emulation) depending on configuration. |
| 44 | BDBUS5 | bidirectional | Channel B data/control bus bit 5; functions include DSR# (RS232), D5 (FIFO), GPIOL1 (MPSSE), or CLKOUT (Host Bus Emulation) depending on configuration. |
| 45 | BDBUS6 | bidirectional | Channel B data/control bus bit 6; functions include DCD# (RS232), D6 (FIFO), GPIOL2 (MPSSE), or I/O0 (Host Bus Emulation) depending on configuration. |
| 46 | BDBUS7 | bidirectional | Channel B data/control bus bit 7; functions include RI# (RS232), D7 (FIFO), GPIOL3 (MPSSE), or I/O1 (Host Bus Emulation) depending on configuration. |
| 47 | GND | power_in | Ground input, 0V reference. |
| 48 | BCBUS0 | bidirectional | Channel B control bus bit 0; functions include TXDEN (RS232), RXF# (FIFO), GPIOH0 (MPSSE), or CS# (Host Bus Emulation) depending on configuration. |
| 49 | VREGOUT | power_out | 1.8V output from integrated voltage regulator; connect to VCORE with 3.3µF filter capacitor. |
| 50 | VREGIN | power_in | 3.3V input to integrated 1.8V voltage regulator; regulates down to 1.8V at VREGOUT. |
| 51 | GND | power_in | Ground input, 0V reference. |
| 52 | BCBUS1 | tri_state | Channel B control bus bit 1; defaults to tri-stated input with internal 75kΩ pull-up to VCCIO; functions include TXE# (FIFO), WRSTB# (Bit-bang), GPIOH1 (MPSSE), or A0 (Host Bus Emulation) depending on configuration. |
| 53 | BCBUS2 | tri_state | Channel B control bus bit 2; defaults to tri-stated input with internal 75kΩ pull-up to VCCIO; functions include RD# (FIFO), RDSTB# (Bit-bang), GPIOH2 (MPSSE), or RD# (Host Bus Emulation) depending on configuration. |
| 54 | BCBUS3 | bidirectional | Channel B control bus bit 3; functions include RXLED# (RS232), WR# (FIFO), GPIOH3 (MPSSE), or WR# (Host Bus Emulation) depending on configuration. |
| 55 | BCBUS4 | input | Channel B control bus bit 4; functions include TXLED# (RS232), SIWUB (FIFO/Bit-bang), or GPIOH4 (MPSSE) depending on configuration. |
| 56 | VCCIO | power_in | 3.3V I/O interface power supply input (2.97-3.63V); 5V tolerant; failure to connect all VCCIO pins results in device failure. |
| 57 | BCBUS5 | tri_state | Channel B control bus bit 5; defaults to tri-stated input with internal 75kΩ pull-up to VCCIO; functions include GPIOH5 (MPSSE) or A13 (Host Bus Emulation) depending on configuration. |
| 58 | BCBUS6 | tri_state | Channel B control bus bit 6; defaults to tri-stated input with internal 75kΩ pull-up to VCCIO; functions include GPIOH6 (MPSSE) or A14 (Host Bus Emulation) depending on configuration. |
| 59 | BCBUS7 | input | Channel B control bus bit 7; functions as PWRSAV# (all modes) - USB Power Save input; PWRSAV#=1 normal operation, PWRSAV#=0 forces suspend mode. |
| 60 | PWREN# | output | Active low power-enable output; PWREN#=0 during normal operation, PWREN#=1 in USB suspend mode or before device configuration. |
| 61 | EEDATA | bidirectional | EEPROM data I/O line; tri-state during device reset; connect directly to EEPROM data-in and via 2.2kΩ resistor to data-out. |
| 62 | EECLK | output | EEPROM clock output signal; tri-state during device reset; outputs EEPROM clock when not in reset. |
| 63 | EECS | bidirectional | EEPROM chip select signal; tri-state during device reset. |
| 64 | VCORE | power_in | 1.8V core supply voltage input (1.62-1.98V); powers internal chip logic. |
| 65 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | FTDI |
| Package | QFN-64-EP(9x9) |
| Category | Interface |
| Pins | 65 |
CAD (KiCad official)
- Symbol:
FT2232HQ-REEL - Footprint:
Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm - 3D model: QFN-64-EP(9x9) (KiCad packages3D, STEP)
- 3D model files:
ft2232hq-reel-etched.step/ft2232hq-reel-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ft2232hq-reel.step/ft2232hq-reel.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: FTDI datasheet (90 pp, sha256
3840b6adcd22e1a4, retrieved 2026-09-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).