# FSDT23C712L02

**FUXINSEMI** · ESD And Surge Protection (TVS/ESD) · SOT-23

FSDT23C712L02 from FUXINSEMI, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O 1 | passive | Protected I/O line 1 with 7V/12V asymmetrical TVS diode to pin 3 (VRWM 12.0V max pin 1 to pin 3, 7.0V max pin 3 to pin 1). |
| 2 | I/O 2 | passive | Protected I/O line 2 with 7V/12V asymmetrical TVS diode to pin 3 (VRWM 12.0V max pin 2 to pin 3, 7.0V max pin 3 to pin 2). |
| 3 | GND | power_in | Common ground reference for both TVS channels; reverse working voltage 7.0V max from pin 3 to pin 1 or 2. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | FUXINSEMI |
| Package | SOT-23 |
| Category | Circuit Protection |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `FSDT23C712L02`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `fsdt23c712l02-etched.step` / `fsdt23c712l02-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fsdt23c712l02.step` / `fsdt23c712l02.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [FUXINSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757278385695670272) (4 pp, sha256 `487c581e484eb236`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/fsdt23c712l02-datasheet.pdf)