main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 17d ago
viewers fs4828: viewers · Ray 17d ago
fs4828-etched.glb Publish 0.1.0 · Ray 17d ago
fs4828-etched.step fs4828: factory component page (tier=lcsc) · Ray 17d ago
fs4828-hero.glb fs4828: hero GLB from the etched model (keeps the MPN mark) · Ray 17d ago
fs4828-hero.overlay.json Publish 0.1.0 · Ray 17d ago
fs4828.glb Publish 0.1.0 · Ray 17d ago
fs4828.kicad_mod Publish 0.1.0 · Ray 17d ago
fs4828.kicad_sym Publish 0.1.0 · Ray 17d ago
fs4828.lbr Publish 0.1.0 · Ray 17d ago
fs4828.step Publish 0.1.0 · Ray 17d ago
package.json Publish 0.1.0 · Ray 17d ago
page.json Set visibility: public · Ray 17d ago
README.md Publish 0.1.0 · Ray 17d ago

FS4828

FOSAN · MOSFETs · SOP-8

FS4828 from FOSAN, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S2 passive Source of MOSFET 2 (pin 1 at the dot-marked corner).
2 G2 input Gate of MOSFET 2; VGS max ±20 V, threshold 1 V min to 3 V max at ID=250uA.
3 S1 passive Source of MOSFET 1.
4 G1 input Gate of MOSFET 1; VGS max ±20 V, threshold 1 V min to 3 V max at ID=250uA.
5 D1 passive Drain of MOSFET 1; BVDSS 60 V, continuous ID 5 A.
6 D1 passive Drain of MOSFET 1 (tied internally to pin 5); BVDSS 60 V, continuous ID 5 A.
7 D2 passive Drain of MOSFET 2; BVDSS 60 V, continuous ID 5 A.
8 D2 passive Drain of MOSFET 2 (tied internally to pin 7); BVDSS 60 V, continuous ID 5 A.

Key specifications

Parameter Value
Manufacturer FOSAN
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS 60 V ID=250uA, VGS=0V 2
Gate Threshold Voltage VGS(th) 1 1.8 3 V ID=250uA, VGS=VDS 2
Zero Gate Voltage Drain Current IDSS 1 uA VGS=0V, VDS=48V 2
Gate Body Leakage IGSS 100 nA VGS=+20V, VDS=0V 2
Static Drain-Source On-State Resistance RDS(ON) 30 45 mΩ ID=5A, VGS=10V 2
Static Drain-Source On-State Resistance RDS(ON) 37 55 mΩ ID=3A, VGS=4.5V 2
Diode Forward Voltage Drop VSD 0.8 1.3 V ISD=1A, VGS=0V 2
Drain-Source Voltage BVDSS 60 V 1
Gate-Source Voltage VGS 20 V 1
Drain Current (continuous) ID 5 A TA = 25°C 1
Drain Current (pulsed) IDM 40 A 1
Total Device Dissipation PD 2000 mW TA = 25°C 1
Junction/Storage Temperature TJ,Tstg -55 150 ℃ 1
Thermal Resistance Junction-Ambient RΘJA 62.5 ℃/W 1

CAD (KiCad official)

  • Symbol: FS4828
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: fs4828-etched.step / fs4828-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fs4828.step / fs4828.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: FOSAN datasheet (5 pp, sha256 7103000d5bb92f49, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF