# FS4805

**FOSAN** · MOSFETs · SOP-8

FS4805 from FOSAN, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S2 | passive | Source of P-channel MOSFET 2, with drain-source breakdown of -30 V. |
| 2 | G2 | input | Gate of P-channel MOSFET 2, with maximum gate-source voltage of ±20 V and threshold of -1.3 to -2.3 V. |
| 3 | S1 | passive | Source of P-channel MOSFET 1, with drain-source breakdown of -30 V. |
| 4 | G1 | input | Gate of P-channel MOSFET 1, with maximum gate-source voltage of ±20 V and threshold of -1.3 to -2.3 V. |
| 5 | D1 | passive | Drain of P-channel MOSFET 1, rated -8.9 A continuous at TA=25°C and -35 A pulsed (tied internally to pin 6). |
| 6 | D1 | passive | Drain of P-channel MOSFET 1, rated -8.9 A continuous at TA=25°C and -35 A pulsed (tied internally to pin 5). |
| 7 | D2 | passive | Drain of P-channel MOSFET 2, rated -8.9 A continuous at TA=25°C and -35 A pulsed (tied internally to pin 8). |
| 8 | D2 | passive | Drain of P-channel MOSFET 2, rated -8.9 A continuous at TA=25°C and -35 A pulsed (tied internally to pin 7). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | FOSAN |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage (absolute maximum rating) | BVDSS |  |  | -30 | V |  | 1 |
| Gate-Source Voltage | VGS |  |  | 20 | V |  | 1 |
| Drain Current (continuous) | ID |  |  | -8.9 | A | TA = 25°C | 1 |
| Drain Current (continuous) | ID |  |  | -7.1 | A | TA = 70°C | 1 |
| Drain Current (pulsed) | IDM |  |  | -35 | A |  | 1 |
| Total Device Dissipation | PTOT |  |  | 2.5 | W | TA = 25°C | 1 |
| Total Device Dissipation | PTOT |  |  | 1.6 | W | TA = 70°C | 1 |
| Thermal Resistance Junction-Ambient | RΘJA |  |  | 50 | ℃/W |  | 1 |
| Avalanche Energy Single Pulse | EAS |  |  | 29 | mJ |  | 1 |
| Junction/Storage Temperature | TJ,Tstg | -55 |  | 150 | ℃ |  | 1 |
| Drain-Source Breakdown Voltage | BVDSS | -30 |  |  | V | ID = -250uA, VGS=0V | 2 |
| Gate Threshold Voltage | VGS(th) | -1.3 | -1.8 | -2.3 | V | ID = -250uA, VGS= VDS | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -1 | uA | VGS=0V, VDS= -24V | 2 |
| Gate Body Leakage | IGSS |  |  | 100 | nA | VGS=+20V, VDS=0V | 2 |
| Static Drain-Source On-State Resistance | RDS(ON) |  | 15 | 21 | mΩ | ID= -8.9A, VGS= -10V | 2 |
| Static Drain-Source On-State Resistance | RDS(ON) |  | 22 | 30 | mΩ | ID= -5.6A, VGS= -4.5V | 2 |
| Diode Forward Voltage Drop | VSD |  | -0.7 | -1 | V | ISD= -1A, VGS=0V | 2 |

## CAD (KiCad official)

- Symbol: `FS4805`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `fs4805-etched.step` / `fs4805-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fs4805.step` / `fs4805.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [FOSAN datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757317878733381632) (5 pp, sha256 `cc10b9854ba455be`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/fs4805-datasheet.pdf)