component
FS4409
Public Made by Adomby adom
FOSAN MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFS4409
FOSAN · MOSFETs · SOP-8
FS4409 from FOSAN, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET, tied internally with pins 2 and 3. |
| 2 | S | passive | Source of the P-channel MOSFET, tied internally with pins 1 and 3. |
| 3 | S | passive | Source of the P-channel MOSFET, tied internally with pins 1 and 2. |
| 4 | G | input | Gate of the P-channel MOSFET; VGS is rated +/-20 V maximum and threshold VGS(th) is -1 V min to -2 V max at ID = -250 uA. |
| 5 | D | passive | Drain of the P-channel MOSFET, tied internally with pins 6, 7 and 8; BVDSS is -30 V and continuous ID is -14 A at TA = 25 C. |
| 6 | D | passive | Drain of the P-channel MOSFET, tied internally with pins 5, 7 and 8; BVDSS is -30 V and continuous ID is -14 A at TA = 25 C. |
| 7 | D | passive | Drain of the P-channel MOSFET, tied internally with pins 5, 6 and 8; BVDSS is -30 V and continuous ID is -14 A at TA = 25 C. |
| 8 | D | passive | Drain of the P-channel MOSFET, tied internally with pins 5, 6 and 7; BVDSS is -30 V and continuous ID is -14 A at TA = 25 C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | FOSAN |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | BVDSS | -30 | V | 1 | |||
| Gate-Source Voltage | VGS | 20 | V | 1 | |||
| Drain Current (continuous) | ID | -14 | A | at TA = 25°C | 1 | ||
| Drain Current (pulsed) | IDM | -70 | A | 1 | |||
| Total Device Dissipation | PTOT | 3 | W | at TA = 25°C | 1 | ||
| Junction/Storage Temperature | TJ,Tstg | -55 | 150 | ℃ | 1 | ||
| Thermal Resistance Junction-Ambient | RΘJA | 42 | ℃/W | 1 | |||
| Drain-Source Breakdown Voltage | BVDSS | -30 | V | ID = -250uA, VGS=0V | 2 | ||
| Gate Threshold Voltage | VGS(th) | -1 | -1.3 | -2 | V | ID = -250uA, VGS= VDS | 2 |
| Zero Gate Voltage Drain Current | IDSS | -1 | uA | VGS=0V, VDS= -24V | 2 | ||
| Gate Body Leakage | IGSS | 100 | nA | VGS=+20V, VDS=0V | 2 | ||
| Static Drain-Source On-State Resistance | RDS(ON) | 8.5 | 11 | mΩ | ID= -15A, VGS= -10V | 2 | |
| Static Drain-Source On-State Resistance | RDS(ON) | 10 | 13 | mΩ | ID= -10A, VGS= -4.5V | 2 | |
| Diode Forward Voltage Drop | VSD | -0.71 | -1 | V | ISD= -1A, VGS=0V | 2 |
CAD (KiCad official)
- Symbol:
FS4409 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
fs4409-etched.step/fs4409-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fs4409.step/fs4409.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: FOSAN datasheet (5 pp, sha256
bea9d760c040fefc, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).