component
FRTC1337S
Public Made by Adomby adom
Nyfea Real Time Clocks, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 9d ago |
| viewers | 9d ago |
| frtc1337s-etched.glb | 9d ago |
| frtc1337s-etched.step | 9d ago |
| frtc1337s-hero.glb | 9d ago |
| frtc1337s-hero.overlay.json | 9d ago |
| frtc1337s.glb | 9d ago |
| frtc1337s.kicad_mod | 9d ago |
| frtc1337s.kicad_sym | 9d ago |
| frtc1337s.lbr | 9d ago |
| frtc1337s.step | 9d ago |
| package.json | 9d ago |
| page.json | 9d ago |
| README.md | 9d ago |
FRTC1337S
Nyfea · Real Time Clocks · SOP-8
FRTC1337S from Nyfea, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | X1 | input | Oscillator circuit input; the 32.768 kHz crystal is connected between X1 and X2, or X1 can be driven as an external clock input. |
| 2 | X2 | output | Oscillator circuit output; together with X1 it connects the 32.768 kHz crystal, and X2 must be left floating when an external 32.768 kHz input is used. |
| 3 | INTA | output | Interrupt output that is asserted low when the time matches the alarm registers and the alarm is enabled; open-drain, requires an external pull-up resistor. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | SDA | bidirectional | Serial data input/output for the 2-wire I2C interface; open-drain output that requires an external pull-up resistor. |
| 6 | SCL | input | Serial clock input that synchronizes data movement on the I2C interface, with a maximum clock frequency of 400 kHz. |
| 7 | SQW/INTB | output | Programmable square-wave or interrupt output; open-drain, requires an external pull-up resistor. |
| 8 | VCC | power_in | Power supply pin; operating range 1.8 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nyfea |
| Package | SOP-8 |
| Category | Clock/Timing |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power voltage | VCC | 1.8 | 5.5 | V | 17 | ||
| Oscillator voltage | VOSC | 1.7 | 5.5 | V | 17 | ||
| Input high level (INTA, SQW/INTB) | VIH | 5.5 | V | 17 | |||
| Input low level | VIL | -0.3 | V | 17 | |||
| Operating temperature | TA | -40 | 85 | ºC | 17 | ||
| Storage temperature | -65 | 150 | C | 17 | |||
| Ambient temperature with power applied | -40 | 125 | C | 17 | |||
| Supply voltage to ground potential (Vcc to GND) | -0.3 | 6.5 | V | 17 | |||
| DC input (all other inputs except Vcc and GND) | -0.3 | V | 17 | ||||
| DC output voltage (SDA, /INT pins) | -0.3 | 6.5 | V | 17 | |||
| Power dissipation | 320 | mW | Depend on package | 17 | |||
| Supply voltage | VCC | 1.8 | 5.5 | V | 17 | ||
| Oscillator voltage | VOSC | 1.7 | 5.5 | V | 17 | ||
| Active supply current | ICC | 150 | µA | Note 1, 5: SCL clocking at max frequency 400kHz, VIL=0.0V, VIH=VCC; recommended crystal on X1 and X2 | 17 | ||
| Standby current | 0.5 | 0.8 | µA | Note 2, 3, 5: 2-wire bus inactive, VIL=0.0V, VIH=VCC; SQW enabled; recommended crystal on X1 and X2 | 17 | ||
| Timekeeping current | 350 | 600 | µA | Note 2, 4, 5: 2-wire bus inactive, VIL=0.0V, VIH=VCC; SQW function disabled (INTCN=1); recommended crystal on X1 and X2 | 17 | ||
| Data retention current | 150 | nA | Note 2, 6: 2-wire bus inactive, VIL=0.0V, VIH=VCC; crystal oscillator disabled | 17 | |||
| Low-level input voltage SCL | VIL1 | -0.3 | V | 17 | |||
| Low-level output current SDA, INTA, INTB | IOL | 3 | mA | VOL = 0.4V | 17 | ||
| Input leakage current SCL | IIL | 1 | µA | 17 | |||
| Output current when OFF SDA, INTA, INTB | IOZ | 1 | µA | 17 | |||
| SCL clock frequency | fSCL | 400 | kHz | 18 | |||
| START condition set-up time | tSU; STA | 0.6 | us | 18 | |||
| START condition hold time | tHD; STA | 0.6 | us | 18 | |||
| Data set-up time (RTC read/write) | tSU; DAT | 200 | ns | 18 | |||
| Data hold time (RTC write) | tHD;DAT1 | 35 | ns | 18 | |||
| Data hold time (RTC read) | tHD;DAT2 | 0 | us | 18 | |||
| STOP condition set-up time | tSU; STO | 0.6 | us | 18 | |||
| Bus idle time between START and STOP condition | tBUF | 1.3 | us | 18 | |||
| SCL low period | tLOW | 1.3 | us | When SCL = L | 18 | ||
| SCL high period | tHIGH | 0.6 | us | When SCL = H | 18 | ||
| Rise time for SCL and SDA | tr | 0.3 | us | 18 | |||
| Fall time for SCL and SDA | tf | 0.3 | us | 18 | |||
| Allowable spike time on bus | tSP | 50 | ns | 18 | |||
| Capacitance load for each bus line | CB | 400 | pF | 18 | |||
| Built-in capacitance CX1, CX2 | CX1, CX2 | 12 | pF | 5 |
CAD (KiCad official)
- Symbol:
FRTC1337S - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
frtc1337s-etched.step/frtc1337s-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);frtc1337s.step/frtc1337s.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nyfea datasheet (21 pp, sha256
9c177ca8874005cf, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).