FP6298XR-G1
Public Made by Adomby adom
Advanced Analog Technology DC-DC Converters, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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FP6298XR-G1
Advanced Analog Technology · DC-DC Converters · SOP-8-EP
FP6298XR-G1 from Advanced Analog Technology, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PGND | power_in | Power ground for the internal power MOSFET source. Tie directly to the ground plane with short, wide traces along with the input/output capacitor returns. |
| 2 | OC | input | Adjustable current-limit programming pin. A resistor of 26kΩ to 500kΩ from OC to GND sets peak switch current from 4.5A down to 0.5A per IOCP = 110000/R3 + 0.3. May be left floating for the default limit; do not add capacitance and keep the trace short. |
| 3 | VCC | power_in | IC power supply input, 2.6V to 5.5V (absolute maximum 6V). Bypass with a low-ESR ceramic capacitor placed as close to the pin as possible. Do not tie back to VOUT. |
| 4 | EN | input | Enable control input, active high. VEN >= 0.96V enables the converter; VEN <= 0.6V shuts it down (shutdown current 0.1µA typ). Absolute maximum 6V. |
| 5 | GND | power_in | Analog/signal ground reference for the IC. Connect to the ground plane together with PGND, CIN and COUT returns. |
| 6 | FB | input | Error-amplifier inverting input for output-voltage feedback. Regulated to VREF = 0.6V (±2%); output is set by VOUT = 0.6V x (1 + R1/R2). Route the divider directly to this pin and keep away from the LX switching node. |
| 7 | NC | unconnected | No connect. Leave floating or tie to GND only; do not connect to any other node. |
| 8 | LX | power_out | Switching node - drain of the internal 12V / 4.5A / 0.08Ω N-channel power MOSFET. Connect to the boost inductor and Schottky diode anode with short, wide traces to minimize EMI. |
| 9 | EP | power_in | Exposed thermal pad on the package bottom. Must be soldered to the PCB ground plane for both electrical ground and heat dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Advanced Analog Technology |
| Package | SOP-8-EP |
| Category | PMIC |
| Pins | 9 |
Ordering variants
Same part, different packaging or reel option.
FP6298XR-G1
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 0 | 6 | V | 4 | ||
| LX Voltage | VLX | 0 | 12 | V | 4 | ||
| EN,FB Voltage | 0 | 6 | V | 4 | |||
| Thermal Resistance (junction to ambient), SOP-8L(EP) | θJA | 83 | °C / W | Natural convection, TA=25°C, JEDEC 51-3 low effective thermal conductivity board (Note1) | 4 | ||
| Junction Temperature | TJ | 150 | °C | 4 | |||
| Operating Temperature | TOP | -40 | 85 | °C | 4 | ||
| Storage Temperature | TST | -65 | 150 | °C | 4 | ||
| Lead Temperature (soldering, 10 sec) | 260 | °C | Soldering, 10 sec | 4 | |||
| Supply Voltage | VIN | 2.6 | 5.5 | V | 5 | ||
| Operating Temperature Range | TA | -40 | 85 | °C | Ambient Temperature | 5 | |
| Input Supply Range | VCC | 2.6 | 5.5 | V | 5 | ||
| Under Voltage Lockout | VUVLO | 2.2 | V | 5 | |||
| UVLO Hysteresis | 0.1 | V | 5 | ||||
| Quiescent Current | ICC | 0.2 | mA | VFB=0.66V, No switching | 5 | ||
| Average Supply Current | ICC | 6.5 | mA | VFB=0.55V, Switching | 5 | ||
| Shutdown Supply Current | ICC | 0.1 | µA | VEN=GND | 5 | ||
| Operation Frequency | FOSC | 400 | 500 | 600 | KHZ | 5 | |
| Frequency Change with Voltage | f△ / V△ | 5 | % | VCC=2.6V to 5.5V | 5 | ||
| Maximum Duty Cycle | TDUTY | 90 | % | 5 | |||
| Reference Voltage | VREF | 0.588 | 0.6 | 0.612 | V | 5 | |
| Line Regulation | 0.2 | % / V | VCC=2.6V~5.5V | 5 | |||
| Enable Voltage | VEN | 0.96 | V | 5 | |||
| Shutdown Voltage | VEN | 0.6 | V | 5 | |||
| On Resistance of Driver | RDS (ON) | 0.08 | Ω | ILX=2A | 5 | ||
| OCP Current | IOCP | 4.5 | A | 5 | |||
| Adjustable OCP Current | IOCP | 0.5 | 4.5 | A | With external resistor 26k~500k | 5 | |
| OTP Temperature | TOTP | 150 | °C | 5 |
CAD (KiCad official)
- Symbol:
FP6298XR-G1 - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
fp6298xr-g1-etched.step/fp6298xr-g1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fp6298xr-g1.step/fp6298xr-g1.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
fp6298xr-g1.step |
125 KB | You want the bare part, or you mark your own boards. |
fp6298xr-g1-etched.step |
2.4 MB | You want the part with FP6298XR-G1 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 577 faces against 152 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Advanced Analog Technology datasheet (10 pp, sha256
fb59e8d123fd1240, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# FP6298XR-G1
**Advanced Analog Technology** · DC-DC Converters · SOP-8-EP
FP6298XR-G1 from Advanced Analog Technology, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PGND | power_in | Power ground for the internal power MOSFET source. Tie directly to the ground plane with short, wide traces along with the input/output capacitor returns. |
| 2 | OC | input | Adjustable current-limit programming pin. A resistor of 26kΩ to 500kΩ from OC to GND sets peak switch current from 4.5A down to 0.5A per IOCP = 110000/R3 + 0.3. May be left floating for the default limit; do not add capacitance and keep the trace short. |
| 3 | VCC | power_in | IC power supply input, 2.6V to 5.5V (absolute maximum 6V). Bypass with a low-ESR ceramic capacitor placed as close to the pin as possible. Do not tie back to VOUT. |
| 4 | EN | input | Enable control input, active high. VEN >= 0.96V enables the converter; VEN <= 0.6V shuts it down (shutdown current 0.1µA typ). Absolute maximum 6V. |
| 5 | GND | power_in | Analog/signal ground reference for the IC. Connect to the ground plane together with PGND, CIN and COUT returns. |
| 6 | FB | input | Error-amplifier inverting input for output-voltage feedback. Regulated to VREF = 0.6V (±2%); output is set by VOUT = 0.6V x (1 + R1/R2). Route the divider directly to this pin and keep away from the LX switching node. |
| 7 | NC | unconnected | No connect. Leave floating or tie to GND only; do not connect to any other node. |
| 8 | LX | power_out | Switching node - drain of the internal 12V / 4.5A / 0.08Ω N-channel power MOSFET. Connect to the boost inductor and Schottky diode anode with short, wide traces to minimize EMI. |
| 9 | EP | power_in | Exposed thermal pad on the package bottom. Must be soldered to the PCB ground plane for both electrical ground and heat dissipation. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Advanced Analog Technology |
| Package | SOP-8-EP |
| Category | PMIC |
| Pins | 9 |
## Ordering variants
Same part, different packaging or reel option.
- `FP6298XR-G1`
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 0 | | 6 | V | | 4 |
| LX Voltage | VLX | 0 | | 12 | V | | 4 |
| EN,FB Voltage | | 0 | | 6 | V | | 4 |
| Thermal Resistance (junction to ambient), SOP-8L(EP) | θJA | | 83 | | °C / W | Natural convection, TA=25°C, JEDEC 51-3 low effective thermal conductivity board (Note1) | 4 |
| Junction Temperature | TJ | | 150 | | °C | | 4 |
| Operating Temperature | TOP | -40 | | 85 | °C | | 4 |
| Storage Temperature | TST | -65 | | 150 | °C | | 4 |
| Lead Temperature (soldering, 10 sec) | | | | 260 | °C | Soldering, 10 sec | 4 |
| Supply Voltage | VIN | 2.6 | | 5.5 | V | | 5 |
| Operating Temperature Range | TA | -40 | | 85 | °C | Ambient Temperature | 5 |
| Input Supply Range | VCC | 2.6 | | 5.5 | V | | 5 |
| Under Voltage Lockout | VUVLO | | 2.2 | | V | | 5 |
| UVLO Hysteresis | | | 0.1 | | V | | 5 |
| Quiescent Current | ICC | | 0.2 | | mA | VFB=0.66V, No switching | 5 |
| Average Supply Current | ICC | | 6.5 | | mA | VFB=0.55V, Switching | 5 |
| Shutdown Supply Current | ICC | | 0.1 | | µA | VEN=GND | 5 |
| Operation Frequency | FOSC | 400 | 500 | 600 | KHZ | | 5 |
| Frequency Change with Voltage | f△ / V△ | | 5 | | % | VCC=2.6V to 5.5V | 5 |
| Maximum Duty Cycle | TDUTY | | 90 | | % | | 5 |
| Reference Voltage | VREF | 0.588 | 0.6 | 0.612 | V | | 5 |
| Line Regulation | | | 0.2 | | % / V | VCC=2.6V~5.5V | 5 |
| Enable Voltage | VEN | | 0.96 | | V | | 5 |
| Shutdown Voltage | VEN | | 0.6 | | V | | 5 |
| On Resistance of Driver | RDS (ON) | | 0.08 | | Ω | ILX=2A | 5 |
| OCP Current | IOCP | | 4.5 | | A | | 5 |
| Adjustable OCP Current | IOCP | 0.5 | | 4.5 | A | With external resistor 26k~500k | 5 |
| OTP Temperature | TOTP | | 150 | | °C | | 5 |
## CAD (KiCad official)
- Symbol: `FP6298XR-G1`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`
- 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files: `fp6298xr-g1-etched.step` / `fp6298xr-g1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fp6298xr-g1.step` / `fp6298xr-g1.glb` are the bare package body.
## 3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
| [`fp6298xr-g1.step`](fp6298xr-g1.step) | 125 KB | You want the bare part, or you mark your own boards. |
| [`fp6298xr-g1-etched.step`](fp6298xr-g1-etched.step) | 2.4 MB | You want the part with `FP6298XR-G1` already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 577 faces against 152 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Advanced Analog Technology datasheet](docs/fp6298xr-g1-datasheet.pdf) (10 pp, sha256 `fb59e8d123fd1240`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/fp6298xr-g1-datasheet.pdf)