component
FP6296XR-G1
Public Made by Adomby adom
Advanced Analog Technology DC-DC Converters, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)
5 files changed
+313−10
fp6296xr-g1.lbr+1−1@@ -71,7 +71,7 @@ <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/> <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">>VALUE</text>-</package>+<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="2.4700"/><vertex x="-2.8400" y="2.8000"/><vertex x="-2.3600" y="2.8000"/></polygon></package> </packages> <symbols> <symbol name="FP6296XR-G1">
package.json+2−1@@ -24,6 +24,7 @@ "docs/hero.png", "docs/fp6296xr-g1-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json" ] }
pads.jsonadded+291@@ -0,0 +1,291 @@+{+ "schema": "adom.pads/1",+ "slug": "fp6296xr-g1",+ "footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm",+ "generated_from": {+ "footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm@sha256:a7971720bdda0353",+ "pins": "page.json:component.pins",+ "overrides": null+ },+ "pin1": {+ "pad": "1",+ "at": [+ -2.475,+ -1.905+ ],+ "corner": "top-left",+ "source": "silk-marker",+ "derived_from": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm@sha256:a7971720bdda0353"+ },+ "pad_count": 9,+ "paste_apertures": 4,+ "issues": [],+ "pads": [+ {+ "pad": "1",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ -1.905+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "1",+ "name": "LX",+ "type": "output",+ "description": "Power switch output. Drain of the internal 15 mΩ / 14 V / 10 A N-channel power MOSFET; connects to the boost inductor and Schottky diode anode. Pin 1 and pin 2 are tied together internally for higher current-carrying capability.",+ "is_pin1": true,+ "source": {+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "2",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ -0.635+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "2",+ "name": "LX",+ "type": "output",+ "description": "Power switch output. Second LX pin bonded to the same internal MOSFET drain as pin 1; must be connected together on the PCB to carry the 10 A switch current.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "3",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ 0.635+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "3",+ "name": "Vcc",+ "type": "power_in",+ "description": "Power supply for the internal control circuitry and gate drivers. Regulated to ~5 V (4.75-5.25 V) internally from HVDD when HVDD = 12 V. Bypass to GND with a ceramic capacitor.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "4",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -2.475,+ 1.905+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "4",+ "name": "EN",+ "type": "input",+ "description": "Enable control input, active high. VEN ≥ 1.1 V enables the converter; VEN ≤ 0.6 V shuts it down (IDD ≤ 1 µA in shutdown). Do not leave floating.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "5",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ 1.905+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "5",+ "name": "FB",+ "type": "input",+ "description": "Error amplifier inverting input (feedback). Connect to a resistor divider from VOUT; regulates to the internal 1.2 V (±2%) reference (VREF = 1.176-1.224 V).",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "6",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ 0.635+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "6",+ "name": "COMP",+ "type": "output",+ "description": "Loop compensation node. Error amplifier output; connect an R-C network to GND to stabilize the current-mode control loop. Sink/source capability ≈ 45 µA.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "7",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ -0.635+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "7",+ "name": "OC",+ "type": "input",+ "description": "Adjustable over-current limit programming pin. Connect a resistor (150 kΩ ↔ 51 kΩ) from OC to GND to set the peak current limit between 2 A and 10 A. Leaving this pin floating disables the adjustment (invalid); the default OCP is 10 A.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "8",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 2.475,+ -1.905+ ],+ "rot": 0.0,+ "size": [+ 1.95,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "8",+ "name": "HVDD",+ "type": "power_in",+ "description": "IC power supply input, 2.7 V to 12 V (abs max 12 V). Provides bias for the internal LDO that generates VCC; also monitored by the UVLO circuit (VUVLO ≈ 2.2 V, 0.1 V hysteresis).",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "9",+ "kind": "smd",+ "shape": "rect",+ "at": [+ 0.0,+ 0.0+ ],+ "rot": 0.0,+ "size": [+ 2.29,+ 3.0+ ],+ "layers": [],+ "thermal": true,+ "pin": "EP",+ "name": "GND",+ "type": "power_in",+ "description": "IC ground - exposed thermal pad on the bottom of the SOP-8L(EP) package. Must be soldered to the PCB ground plane for correct electrical operation and heat dissipation (θJC ≈ 10 °C/W, θJA ≈ 60 °C/W).",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+ "meaning": null,+ "correspondence": "derived: sole unmatched pin \"EP\" to sole thermal pad \"9\""+ }+ }+ ]+}
page.json+18−7@@ -32,7 +32,7 @@ "number": "1", "name": "LX", "type": "output",- "description": "Power switch output. Drain of the internal 15 m\u03a9 / 14 V / 10 A N-channel power MOSFET; connects to the boost inductor and Schottky diode anode. Pin 1 and pin 2 are tied together internally for higher current-carrying capability."+ "description": "Power switch output. Drain of the internal 15 mΩ / 14 V / 10 A N-channel power MOSFET; connects to the boost inductor and Schottky diode anode. Pin 1 and pin 2 are tied together internally for higher current-carrying capability." }, { "number": "2",@@ -50,37 +50,37 @@ "number": "4", "name": "EN", "type": "input",- "description": "Enable control input, active high. VEN \u2265 1.1 V enables the converter; VEN \u2264 0.6 V shuts it down (IDD \u2264 1 \u00b5A in shutdown). Do not leave floating."+ "description": "Enable control input, active high. VEN ≥ 1.1 V enables the converter; VEN ≤ 0.6 V shuts it down (IDD ≤ 1 µA in shutdown). Do not leave floating." }, { "number": "5", "name": "FB", "type": "input",- "description": "Error amplifier inverting input (feedback). Connect to a resistor divider from VOUT; regulates to the internal 1.2 V (\u00b12%) reference (VREF = 1.176-1.224 V)."+ "description": "Error amplifier inverting input (feedback). Connect to a resistor divider from VOUT; regulates to the internal 1.2 V (±2%) reference (VREF = 1.176-1.224 V)." }, { "number": "6", "name": "COMP", "type": "output",- "description": "Loop compensation node. Error amplifier output; connect an R-C network to GND to stabilize the current-mode control loop. Sink/source capability \u2248 45 \u00b5A."+ "description": "Loop compensation node. Error amplifier output; connect an R-C network to GND to stabilize the current-mode control loop. Sink/source capability ≈ 45 µA." }, { "number": "7", "name": "OC", "type": "input",- "description": "Adjustable over-current limit programming pin. Connect a resistor (150 k\u03a9 \u2194 51 k\u03a9) from OC to GND to set the peak current limit between 2 A and 10 A. Leaving this pin floating disables the adjustment (invalid); the default OCP is 10 A."+ "description": "Adjustable over-current limit programming pin. Connect a resistor (150 kΩ ↔ 51 kΩ) from OC to GND to set the peak current limit between 2 A and 10 A. Leaving this pin floating disables the adjustment (invalid); the default OCP is 10 A." }, { "number": "8", "name": "HVDD", "type": "power_in",- "description": "IC power supply input, 2.7 V to 12 V (abs max 12 V). Provides bias for the internal LDO that generates VCC; also monitored by the UVLO circuit (VUVLO \u2248 2.2 V, 0.1 V hysteresis)."+ "description": "IC power supply input, 2.7 V to 12 V (abs max 12 V). Provides bias for the internal LDO that generates VCC; also monitored by the UVLO circuit (VUVLO ≈ 2.2 V, 0.1 V hysteresis)." }, { "number": "EP", "name": "GND", "type": "power_in",- "description": "IC ground - exposed thermal pad on the bottom of the SOP-8L(EP) package. Must be soldered to the PCB ground plane for correct electrical operation and heat dissipation (\u03b8JC \u2248 10 \u00b0C/W, \u03b8JA \u2248 60 \u00b0C/W)."+ "description": "IC ground - exposed thermal pad on the bottom of the SOP-8L(EP) package. Must be soldered to the PCB ground plane for correct electrical operation and heat dissipation (θJC ≈ 10 °C/W, θJA ≈ 60 °C/W)." } ], "provenance": {@@ -102,6 +102,17 @@ "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"+ },+ "pin1": {+ "pad": "1",+ "at": [+ -2.475,+ -1.905+ ],+ "corner": "top-left",+ "source": "silk-marker",+ "derived_from": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm@sha256:a7971720bdda0353",+ "mark": "drawn" } }, "metadata": {
viewers/footprint.html+1−1@@ -23,7 +23,7 @@ rect.pad.hi{stroke:var(--hi);stroke-width:.15;paint-order:stroke} #tip .td{font-size:11px;color:var(--ink);margin-top:5px;line-height:1.4} </style></head><body> <div class=bar><span class=h>PCB footprint</span><span class=sp></span><button class="lyrtog on" data-lyr="copper"><span class="d" style="background:#e35d5d"></span>Copper</button><button class="lyrtog on" data-lyr="silk"><span class="d" style="background:#e6edf3"></span>Silkscreen</button><button class="lyrtog" data-lyr="fab"><span class="d" style="background:#8b949e"></span>Fab</button><button class="lyrtog" data-lyr="courtyard"><span class="d" style="background:#bc8cff"></span>Courtyard</button></div>-<div class=stage id=stage><svg xmlns='http://www.w3.org/2000/svg' viewBox='-4.100 -3.100 8.200 6.200' style='width:100%;height:100%'><line class='ly-silk' x1='-2.060' y1='-2.560' x2='2.060' y2='-2.560' stroke='#d8b4fe' stroke-width='0.120'/><line class='ly-silk' x1='-2.060' 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y1='2.460' x2='-3.700' y2='2.460' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='-2.200' y1='2.700' x2='-2.200' y2='2.460' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='2.200' y1='-2.700' x2='2.200' y2='-2.460' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='2.200' y1='-2.460' x2='3.700' y2='-2.460' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='2.200' y1='2.460' x2='2.200' y2='2.700' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='2.200' y1='2.700' x2='-2.200' y2='2.700' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='3.700' y1='-2.460' x2='3.700' y2='2.460' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='3.700' y1='2.460' x2='2.200' y2='2.460' stroke='#4ade80' stroke-width='0.050'/><rect class='ly-copper pad' data-num='1' data-name='LX' x='-3.450' y='-2.205' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='-2.475' y='-1.905' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>1</text><rect class='ly-copper pad' data-num='2' data-name='LX' x='-3.450' y='-0.935' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='-2.475' y='-0.635' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>2</text><rect class='ly-copper pad' data-num='3' data-name='Vcc' x='-3.450' y='0.335' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='-2.475' y='0.635' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>3</text><rect class='ly-copper pad' data-num='4' data-name='EN' x='-3.450' y='1.605' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='-2.475' y='1.905' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>4</text><rect class='ly-copper pad' data-num='5' data-name='FB' x='1.500' y='1.605' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='2.475' y='1.905' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>5</text><rect class='ly-copper pad' data-num='6' data-name='COMP' x='1.500' y='0.335' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='2.475' y='0.635' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>6</text><rect class='ly-copper pad' data-num='7' data-name='OC' x='1.500' y='-0.935' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='2.475' y='-0.635' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>7</text><rect class='ly-copper pad' data-num='8' data-name='HVDD' x='1.500' y='-2.205' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='2.475' y='-1.905' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' 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