component

FP6277XR-G1

Public Made by Adom

by adom

Advanced Analog Technology DC-DC Converters, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs fp6277xr-g1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
fp6277xr-g1-etched.fit.json fp6277xr-g1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
fp6277xr-g1-etched.glb fp6277xr-g1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
fp6277xr-g1-etched.step fp6277xr-g1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
fp6277xr-g1.glb fix footprint: SOIC-8_3.9x4.9mm_P1.27mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (ep_dropped, 8 pins; datasheet EP… · Ray
fp6277xr-g1.kicad_mod fix footprint: SOIC-8_3.9x4.9mm_P1.27mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (ep_dropped, 8 pins; datasheet EP… · Ray
fp6277xr-g1.kicad_sym add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no… · Ray
fp6277xr-g1.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
fp6277xr-g1.step fix footprint: SOIC-8_3.9x4.9mm_P1.27mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (ep_dropped, 8 pins; datasheet EP… · Ray
package.json Publish 0.2.0 · Ray
pads.json add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no… · Ray
page.json fp6277xr-g1: specified limits as data (metadata.characteristics, 8 rows from the datasheet) · Ray
README.md fp6277xr-g1: specified limits as data (metadata.characteristics, 8 rows from the datasheet) · Ray

FP6277XR-G1

Advanced Analog Technology · DC-DC Converters · SOP-8-EP

FP6277XR-G1 from Advanced Analog Technology, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 LX power_out Power switch output. Internally tied to the drain of the integrated high-side/low-side MOSFETs; connect to the boost inductor. Absolute max VLX = 7 V. Pins 1 and 2 are tied together internally and must both be connected.
2 LX power_out Power switch output (second LX pin, internally tied to pin 1). Connect together with pin 1 to the boost inductor node. Absolute max VLX = 7 V.
3 VIN power_in IC power supply input. Operating range 2.4 V-4.5 V (absolute max 6 V). Bypass to GND with a low-ESR ceramic capacitor.
4 EN input Enable control, active high. VEN ≥ 0.96 V enables the converter; VEN ≤ 0.6 V places the part in shutdown (ICC ≈ 0.1 µA). Do not leave floating.
5 GND power_in IC signal/analog ground. Must be tied to the exposed pad (PGND) and to the system ground plane.
6 FB input Error-amplifier inverting input (feedback). Regulated to the internal 0.6 V reference (VREF = 0.588 V-0.612 V). Connect to a resistor divider from VOUT to set the output voltage: VOUT = 0.6 V × (1 + R_top/R_bot).
7 OC input Adjustable current-limit setting. Connect a resistor from OC to GND to program the cycle-by-cycle switch current limit (typ. IOCP = 7 A; see Ocset Resistance vs Current Limit curve). Resistor must return to ground.
8 VO power_in Output voltage sense pin. Connect to the boost converter output rail; used internally by the MUX/bulk-well switch and load-disconnect circuitry. Absolute max 6 V.
EP PGND power_in Exposed thermal pad / power ground. Must be soldered to the PCB ground plane and connected to GND (pin 5) for proper operation and heat dissipation.

Key specifications

Parameter Value
Manufacturer Advanced Analog Technology
Package SOP-8-EP
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • FP6277XR-G1

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VIN 2.4 4.5 V 5
Operating Temperature Range TA -40 85 °C Ambient Temperature 5
Feedback Voltage VREF 0.588 0.6 0.612 V VIN=4.5V 5
Supply Voltage VIN 0 6 V 4
LX Voltage VLX 0 7 V 4
EN,FB,OC,VO Voltage 0 6 V 4
Operating Temperature TOP -40 85 °C 4
Storage Temperature TST -65 150 °C 4

CAD (KiCad official)

  • Symbol: FP6277XR-G1
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
  • 3D model: SOP-8-EP (KiCad packages3D, STEP)
  • 3D model files: fp6277xr-g1-etched.step / fp6277xr-g1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fp6277xr-g1.step / fp6277xr-g1.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
fp6277xr-g1.step 193 KB You want the bare part, or you mark your own boards.
fp6277xr-g1-etched.step 1.6 MB You want the part with FP6277XR-G1 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 415 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Advanced Analog Technology datasheet (12 pp, sha256 583d018398bfcefb, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF