component
FP6186S5
Public Made by Adomby adom
Fitipower Integrated Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
FP6186S5
Fitipower Integrated Tech · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
FP6186S5 from Fitipower Integrated Tech, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Supply voltage input, specified for 1.7V to 5.5V, with absolute maximum VIN to GND of -0.3V to +6V. |
| 2 | GND | power_in | Ground reference pin for the regulator. |
| 3 | EN | input | Chip enable input: pull high to enable and pull low or leave floating to disable; TTL/CMOS compatible with VEN(ON) of 1V minimum and VEN(OFF) of 0.4V maximum. |
| 4 | FB | input | Feedback pin for the external resistor divider that sets the output voltage, with VFB of 0.79V to 0.81V (0.8V typical) at IOUT = 10mA. |
| 5 | VOUT | power_out | LDO regulated output rated for 300mA, requiring a minimum 1µF X7R or X5R ceramic output capacitor for stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Fitipower Integrated Tech |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | VIN | 1.7 | 5.5 | V | 4 | ||
| Output Voltage Accuracy | ΔVOUT | -1.25 | 1.25 | % | IOUT = 10mA | 4 | |
| Feedback Reference | VFB | 0.79 | 0.8 | 0.81 | V | IOUT = 10mA | 4 |
| Current Limit | ILIM | 0.45 | A | RLOAD=0Ω, 2.2V≦VIN≦5.5V | 4 | ||
| Quiescent Current | IQ | 60 | μA | VEN=5V, IOUT=0A | 4 | ||
| Standby Current | ISTBY | 0.1 | 1 | μA | VEN=0V | 4 | |
| Dropout Voltage | VDROP | 700 | 910 | mV | IOUT=300mA; VOUT =1.2V | 4 | |
| Dropout Voltage | VDROP | 400 | 520 | mV | IOUT=300mA; VOUT =1.5V | 4 | |
| Dropout Voltage | VDROP | 290 | 380 | mV | IOUT=300mA; VOUT =1.8V | 4 | |
| Dropout Voltage | VDROP | 260 | 340 | mV | IOUT=300mA; VOUT =2.5V | 4 | |
| Dropout Voltage | VDROP | 240 | 310 | mV | IOUT=300mA; VOUT =2.7V | 4 | |
| Dropout Voltage | VDROP | 220 | 290 | mV | IOUT=300mA; VOUT =3.0V | 4 | |
| Dropout Voltage | VDROP | 200 | 260 | mV | IOUT=300mA; VOUT =3.3V | 4 | |
| Line Regulation | ΔVLINE | 1 | 8 | mV | IOUT=1mA, VIN=VOUT +1V to 5V | 4 | |
| Load Regulation | ΔVLOAD | 6 | 30 | mV | IOUT =0 ~ 300mA | 4 | |
| EN Threshold Start-up | VEN(ON) | 1 | V | Start-up | 4 | ||
| EN Threshold Shutdown | VEN(OFF) | 0.4 | V | Shutdown | 4 | ||
| Enable Pin Current | IEN | 0.3 | μA | 4 | |||
| Output Noise Voltage | VON | 50 | μVRMS | COUT=1μF, IOUT=0A | 4 | ||
| Output Discharge Resistance | RDIS | 60 | Ω | VEN=0V | 4 | ||
| Ripple Rejection | PSRR | 75 | dB | VIN=VOUT+1VDC+0.2VP-P(AC), fRIPPLE=1KHz, VOUT≧1.8V, IOUT=10mA | 4 | ||
| Thermal Shutdown Threshold | TSD | 145 | °C | 4 | |||
| Thermal Shutdown Hysteresis | ΔTSD | 25 | °C | 4 | |||
| Supply Voltage | VIN | 1.7 | 5.5 | V | 3 | ||
| Output Current | IOUT | 300 | mA | 3 | |||
| Operating Temperature Range | -40 | 85 | °C | 3 | |||
| VIN, EN to GND | -0.3 | 6 | V | 3 | |||
| Power Dissipation | PD | 0.4 | W | @25°C | 3 | ||
| Package Thermal Resistance Junction-to-Ambient | θJA | 250 | °C/W | 3 | |||
| Package Thermal Resistance Junction-to-Case | θJC | 130 | °C/W | 3 | |||
| Junction Temperature | -40 | 150 | °C | 3 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 3 | ||
| Lead Temperature (Soldering) | 260 | °C | 10 sec soldering | 3 |
CAD (KiCad official)
- Symbol:
FP6186S5 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
fp6186s5-etched.step/fp6186s5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fp6186s5.step/fp6186s5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Fitipower Integrated Tech datasheet (7 pp, sha256
db03f4a622d21852, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# FP6186S5
**Fitipower Integrated Tech** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
FP6186S5 from Fitipower Integrated Tech, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Supply voltage input, specified for 1.7V to 5.5V, with absolute maximum VIN to GND of -0.3V to +6V. |
| 2 | GND | power_in | Ground reference pin for the regulator. |
| 3 | EN | input | Chip enable input: pull high to enable and pull low or leave floating to disable; TTL/CMOS compatible with VEN(ON) of 1V minimum and VEN(OFF) of 0.4V maximum. |
| 4 | FB | input | Feedback pin for the external resistor divider that sets the output voltage, with VFB of 0.79V to 0.81V (0.8V typical) at IOUT = 10mA. |
| 5 | VOUT | power_out | LDO regulated output rated for 300mA, requiring a minimum 1µF X7R or X5R ceramic output capacitor for stability. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Fitipower Integrated Tech |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | VIN | 1.7 | | 5.5 | V | | 4 |
| Output Voltage Accuracy | ΔVOUT | -1.25 | | 1.25 | % | IOUT = 10mA | 4 |
| Feedback Reference | VFB | 0.79 | 0.8 | 0.81 | V | IOUT = 10mA | 4 |
| Current Limit | ILIM | | | 0.45 | A | RLOAD=0Ω, 2.2V≦VIN≦5.5V | 4 |
| Quiescent Current | IQ | | | 60 | μA | VEN=5V, IOUT=0A | 4 |
| Standby Current | ISTBY | | 0.1 | 1 | μA | VEN=0V | 4 |
| Dropout Voltage | VDROP | | 700 | 910 | mV | IOUT=300mA; VOUT =1.2V | 4 |
| Dropout Voltage | VDROP | | 400 | 520 | mV | IOUT=300mA; VOUT =1.5V | 4 |
| Dropout Voltage | VDROP | | 290 | 380 | mV | IOUT=300mA; VOUT =1.8V | 4 |
| Dropout Voltage | VDROP | | 260 | 340 | mV | IOUT=300mA; VOUT =2.5V | 4 |
| Dropout Voltage | VDROP | | 240 | 310 | mV | IOUT=300mA; VOUT =2.7V | 4 |
| Dropout Voltage | VDROP | | 220 | 290 | mV | IOUT=300mA; VOUT =3.0V | 4 |
| Dropout Voltage | VDROP | | 200 | 260 | mV | IOUT=300mA; VOUT =3.3V | 4 |
| Line Regulation | ΔVLINE | | 1 | 8 | mV | IOUT=1mA, VIN=VOUT +1V to 5V | 4 |
| Load Regulation | ΔVLOAD | | 6 | 30 | mV | IOUT =0 ~ 300mA | 4 |
| EN Threshold Start-up | VEN(ON) | 1 | | | V | Start-up | 4 |
| EN Threshold Shutdown | VEN(OFF) | | | 0.4 | V | Shutdown | 4 |
| Enable Pin Current | IEN | | | 0.3 | μA | | 4 |
| Output Noise Voltage | VON | | | 50 | μVRMS | COUT=1μF, IOUT=0A | 4 |
| Output Discharge Resistance | RDIS | | | 60 | Ω | VEN=0V | 4 |
| Ripple Rejection | PSRR | 75 | | | dB | VIN=VOUT+1VDC+0.2VP-P(AC), fRIPPLE=1KHz, VOUT≧1.8V, IOUT=10mA | 4 |
| Thermal Shutdown Threshold | TSD | | | 145 | °C | | 4 |
| Thermal Shutdown Hysteresis | ΔTSD | | | 25 | °C | | 4 |
| Supply Voltage | VIN | 1.7 | | 5.5 | V | | 3 |
| Output Current | IOUT | | | 300 | mA | | 3 |
| Operating Temperature Range | | -40 | | 85 | °C | | 3 |
| VIN, EN to GND | | -0.3 | | 6 | V | | 3 |
| Power Dissipation | PD | | | 0.4 | W | @25°C | 3 |
| Package Thermal Resistance Junction-to-Ambient | θJA | | | 250 | °C/W | | 3 |
| Package Thermal Resistance Junction-to-Case | θJC | | | 130 | °C/W | | 3 |
| Junction Temperature | | -40 | | 150 | °C | | 3 |
| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 3 |
| Lead Temperature (Soldering) | | | | 260 | °C | 10 sec soldering | 3 |
## CAD (KiCad official)
- Symbol: `FP6186S5`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `fp6186s5-etched.step` / `fp6186s5-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fp6186s5.step` / `fp6186s5.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Fitipower Integrated Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589837349980180480) (7 pp, sha256 `db03f4a622d21852`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/fp6186s5-datasheet.pdf)