component
FOD3150
Public Made by Adomby adom
onsemi Logic Output Optoisolators, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFOD3150
onsemi · Logic Output Optoisolators · DIP-8
FOD3150 from onsemi, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Not connected; leave open. |
| 2 | Anode | passive | LED anode; recommended input current IF(ON) is 7 to 16 mA and reverse input voltage is limited to 5 V. |
| 3 | Cathode | passive | LED cathode; reverse input voltage is limited to 5 V (VR). |
| 4 | NC | unconnected | Not connected; leave open. |
| 5 | VSS | power_in | Negative supply voltage (ground reference); recommended VDD-VSS is 15 to 30 V, and a 0.1 µF bypass capacitor must be connected between pins 5 and 8. |
| 6 | VO2 | output | Output voltage 2, internally connected to VO1 (push-pull P-channel output stage); drive it together with pin 7. |
| 7 | VO1 | output | Output voltage 1, push-pull gate-drive output that swings close to VDD; peak output current is rated 1.5 A. |
| 8 | VDD | power_in | Positive supply voltage; recommended 15 to 30 V with absolute maximum VDD-VSS of 35 V, bypassed to pin 5 with a 0.1 µF capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | DIP-8 |
| Category | Optoisolators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Forward Voltage | VF | 1.2 | 1.5 | 1.8 | V | IF = 10 mA | 3 |
| Input Reverse Breakdown Voltage | BVR | 5 | V | IR = 10 µA | 3 | ||
| High Level Output Current | IOH | 0.2 | A | VO = VDD, 0.75 V | 4 | ||
| High Level Output Current | IOH | 1 | A | VO = VDD, 4 V | 4 | ||
| Low Level Output Current | IOL | 0.2 | A | VO = VDD + 0.75 V | 4 | ||
| Low Level Output Current | IOL | 1 | A | VO = VDD + 4 V | 4 | ||
| High Level Supply Current | IDDH | 2.8 | 5 | mA | VO = Open, IF = 7 to 16 mA | 4 | |
| Low Level Supply Current | IDDL | 2.8 | 5 | mA | VO = Open, VF = 0 to 0.8 V | 4 | |
| Threshold Input Current Low to High | IFLH | 2.3 | 5 | mA | IO = 0 mA, VO > 5 V | 4 | |
| Threshold Input Voltage High to Low | VFHL | 0.8 | V | IO = 0 mA, VO < 5 V | 4 | ||
| Under Voltage Lockout Threshold (turn-on) | VUVLO+ | 11 | 12.7 | 14 | V | IF = 10 mA, VO > 5 V | 4 |
| Under Voltage Lockout Threshold (turn-off) | VUVLO- | 9.7 | 11.2 | 12.7 | V | IF = 10 mA, VO < 5 V | 4 |
| Propagation Delay Time to Logic Low Output | tPHL | 100 | 275 | 500 | ns | IF = 7 mA to 16 mA, Rg = 20 Ω, Cg = 10 nF, f = 10 kHz, Duty Cycle = 50 % | 4 |
| Propagation Delay Time to Logic High Output | tPLH | 100 | 255 | 500 | ns | IF = 7 mA to 16 mA, Rg = 20 Ω, Cg = 10 nF, f = 10 kHz, Duty Cycle = 50 % | 4 |
| Pulse Width Distortion, /tPHL, tPLH/ | PWD | 20 | 300 | ns | IF = 7 mA to 16 mA, Rg = 20 Ω, Cg = 10 nF, f = 10 kHz, Duty Cycle = 50 % | 4 | |
| Propagation Delay Difference Between Any Two Parts or Channels, (tPHL, tPLH) | PDD (Skew) | -350 | 350 | ns | 4 | ||
| Common Mode Transient Immunity at Output High | /CMH/ | 20 | 50 | kV/µs | TA = 25°C, VDD = 30 V, IF = 7 to 16 mA, VCM = 2000 V | 4 | |
| Common Mode Transient Immunity at Output Low | /CML/ | 20 | 50 | kV/µs | TA = 25°C, VDD = 30 V, VF = 0 V, VCM = 2000 V | 4 | |
| Temperature Coefficient of Forward Voltage | (VF / TA) | -1.8 | mV/°C | 3 | |||
| Input Capacitance | CIN | 60 | pF | f = 1 MHz, VF = 0 V | 4 | ||
| Under Voltage Lockout Threshold Hysteresis | UVLOHYS | 1.5 | V | 4 | |||
| Output Rise Time (10%, 90%) | tr | 60 | ns | 4 | |||
| Output Fall Time (90%, 10%) | tf | 60 | ns | 4 | |||
| UVLO ON Turn On Delay | tUVLO ON | 1.6 | µs | IF = 10 mA, VO > 5 V | 4 | ||
| UVLO OFF Turn Off Delay | tUVLO OFF | 0.4 | µs | IF = 10 mA, VO < 5 V | 4 | ||
| Terminal Temperature Ambient Operating Temperature | TA | -40 | 100 | °C | 3 | ||
| Power Supply | VDD, VSS | 15 | 30 | V | 3 | ||
| Input Current (ON) | IF(ON) | 7 | 16 | mA | 3 | ||
| Input Voltage (OFF) | VF(OFF) | 0 | 0.8 | V | 3 | ||
| Storage Temperature | TSTG | -55 | 125 | °C | 3 | ||
| Operating Temperature | TOPR | -40 | 100 | °C | 3 | ||
| Junction Temperature | TJ | -40 | 125 | °C | 3 | ||
| Lead Wave Solder Temperature | TSOL | 260 | °C | for 10 sec | 3 | ||
| Average Input Current | IF(AVG) | 25 | mA | 3 | |||
| Reverse Input Voltage | VR | 5 | V | 3 | |||
| Peak Output Current | IO(PEAK) | 1.5 | A | Maximum pulse width = 10 µs, maximum duty cycle = 0.2 % | 3 | ||
| Supply Voltage | VDD, VSS | 0 | 35 | V | 3 | ||
| Peak Output Voltage | VO(PEAK) | 0 | V | upper limit VDD | 3 | ||
| Input Signal Rise and Fall Time | tR(IN), tF(IN) | 500 | ns | 3 | |||
| Input Power Dissipation | PDI | 45 | mW | 3 | |||
| Output Power Dissipation | PDO | 250 | mW | 3 |
CAD (KiCad official)
- Symbol:
FOD3150 - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
fod3150-etched.step/fod3150-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fod3150.step/fod3150.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (18 pp, sha256
763fe19075f3774b, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).