component
FOD3120
Public Made by Adomby adom
onsemi Logic Output Optoisolators, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFOD3120
onsemi · Logic Output Optoisolators · DIP-8
FOD3120 from onsemi, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Not connected; the datasheet lists no internal connection for this pin. |
| 2 | Anode | input | LED anode input; recommended ON input current is 7 to 16 mA and OFF input voltage is 0 to 0.8 V. |
| 3 | Cathode | input | LED cathode input; reverse input voltage is limited to 5 V. |
| 4 | NC | unconnected | Not connected; the datasheet lists no internal connection for this pin. |
| 5 | VSS | power_in | Negative supply voltage; recommended VDD-VSS is 15 to 30 V, with an absolute maximum VDD-VSS of 0 to 35 V. |
| 6 | VO2 | output | Output voltage 2 of the push-pull P-channel MOSFET output stage, internally connected to VO1. |
| 7 | VO1 | output | Output voltage 1 of the push-pull P-channel MOSFET output stage, internally connected to VO2, with 2.5 A peak output current capability. |
| 8 | VDD | power_in | Positive supply voltage; recommended VDD-VSS is 15 to 30 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | DIP-8 |
| Category | Optoisolators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | TSTG | -55 | 125 | °C | 5 | ||
| Operating Temperature | TOPR | -40 | 100 | °C | 5 | ||
| Junction Temperature | TJ | -40 | 125 | °C | 5 | ||
| Lead Wave Solder Temperature | TSOL | 260 | °C | for 10 sec | 5 | ||
| Average Input Current | IF(AVG) | 25 | mA | 5 | |||
| Peak Transient Forward Current | IF(PEAK) | 1 | A | PW ≤ 1 µs, 300 pps (note 3) | 5 | ||
| Operating Frequency | f | 50 | kHz | note 4: IO(PEAK) ≤ 2.5 A (≤ 0.3 µs) | 5 | ||
| Reverse Input Voltage | VR | 5 | V | 5 | |||
| Peak Output Current | IO(PEAK) | 3 | A | max pulse width 10 µs, max duty cycle 1.1% (note 5) | 5 | ||
| Supply Voltage | VDD, VSS | 0 | 35 | V | 5 | ||
| Supply Voltage at high ambient | VDD, VSS | 0 | 30 | V | TA ≥ 90°C | 5 | |
| Peak Output Voltage | VO(PEAK) | 0 | V | printed as 0 to VDD; upper limit is VDD (not numeric) | 5 | ||
| Input Signal Rise and Fall Time | tR(IN), tF(IN) | 500 | ns | 5 | |||
| Input Power Dissipation | PDI | 45 | mW | note 6: derate linearly above 87°C free air, 0.77 mW/°C; note 8 | 5 | ||
| Output Power Dissipation | PDO | 250 | mW | note 7: no derating required across temperature range | 5 | ||
| Ambient Operating Temperature | TA | -40 | 100 | °C | 5 | ||
| Power Supply | VDD, VSS | 15 | 30 | V | 5 | ||
| Input Current (ON) | IF(ON) | 7 | 16 | mA | 5 | ||
| Input Voltage (OFF) | VF(OFF) | 0 | 0.8 | V | 5 | ||
| Input-Output Isolation Voltage | VISO | 5000 | VRMS | TA = 25ºC, R.H.< 50%, t = 1.0 min, II-O ≤ 10 µA, 50 Hz | 6 | ||
| Isolation Capacitance | CISO | 1 | pF | VI-O = 0 V, Freq = 1.0 MHz | 6 | ||
| Input Forward Voltage | VF | 1.2 | 1.5 | 1.8 | V | IF = 10 mA | 6 |
| Temperature Coefficient of Forward Voltage | Δ(VF / TA) | -1.8 | mV/ºC | 6 | |||
| Input Reverse Breakdown Voltage | BVR | 5 | V | IR = 10 µA | 6 | ||
| Input Capacitance | CIN | 60 | pF | f = 1 MHz, VF = 0 V | 6 | ||
| High Level Output Current | IOH | -1 | -2 | -2.5 | A | VO = VDD, 3 V | 6 |
| High Level Output Current | IOH | -2 | -2.5 | A | VO = VDD, 6 V | 6 | |
| Low Level Output Current | IOL | 1 | 2 | 2.5 | A | VO = VSS + 3 V | 6 |
| Low Level Output Current | IOL | 2 | 2.5 | A | VO = VSS + 6 V | 6 | |
| High Level Output Voltage (signed offset from VDD) | VOH | -6.25 | -2.5 | V | IF = 10 mA, IO = -2.5 A; printed VDD, 6.25 V / VDD, 2.5 V | 6 | |
| High Level Output Voltage (signed offset from VDD) | VOH | -0.25 | -0.1 | V | IF = 10 mA, IO = -100 mA; printed VDD, 0.25 V / VDD, 0.1 V | 6 | |
| Low Level Output Voltage (signed offset from VSS) | VOL | 2.5 | 6.25 | V | IF = 0 mA, IO = 2.5 A; printed VSS + 2.5 V / VSS + 6.25 V | 6 | |
| Low Level Output Voltage (signed offset from VSS) | VOL | 0.1 | 0.25 | V | IF = 0 mA, IO = 100 mA; printed VSS + 0.1 V / VSS + 0.25 V | 6 | |
| High Level Supply Current | IDDH | 2.8 | 3.8 | mA | VO = Open, IF = 7 to 16 mA | 6 | |
| Low Level Supply Current | IDDL | 2.8 | 3.8 | mA | VO = Open, VF = 0 to 0.8 V | 6 | |
| Threshold Input Current Low to High | IFLH | 2.3 | 5 | mA | IO = 0 mA, VO > 5 V | 6 | |
| Threshold Input Voltage High to Low | VFHL | 0.8 | V | IO = 0 mA, VO < 5 V | 6 | ||
| Under Voltage Lockout Threshold | VUVLO+ | 11.5 | 12.7 | 13.5 | V | IF = 10 mA, VO > 5 V | 6 |
| Under Voltage Lockout Threshold | VUVLO- | 10 | 11.2 | 12 | V | IF = 10 mA, VO < 5 V | 6 |
| Under Voltage Lockout Threshold Hysteresis | UVLOHYS | 1.5 | V | 6 | |||
| Propagation Delay Time to Logic Low Output | tPHL | 150 | 275 | 400 | ns | IF = 7 mA to 16 mA, Rg = 10 Ω, Cg = 10 nF, f = 10 kHz, Duty Cycle = 50% | 7 |
| Propagation Delay Time to Logic High Output | tPLH | 150 | 255 | 400 | ns | IF = 7 mA to 16 mA, Rg = 10 Ω, Cg = 10 nF, f = 10 kHz, Duty Cycle = 50% | 7 |
| Pulse Width Distortion | PWD | 20 | 100 | ns | /tPHL, tPLH/ | 7 | |
| Propagation Delay Difference Between Any Two Parts or Channels | PDD (Skew) | -250 | 250 | ns | (tPHL, tPLH), note 11 | 7 | |
| Output Rise Time (10%, 90%) | tR | 60 | ns | 7 | |||
| Output Fall Time (90%, 10%) | tF | 60 | ns | 7 | |||
| UVLO Turn On Delay | tUVLO ON | 1.6 | µs | IF = 10 mA, VO > 5 V | 7 | ||
| UVLO Turn Off Delay | tUVLO OFF | 0.4 | µs | IF = 10 mA, VO < 5 V | 7 | ||
| Common Mode Transient Immunity at Output High | /CMH/ | 35 | 50 | kV/µs | TA = 25°C, VDD = 30 V, IF = 7 to 16 mA, VCM = 2000 V | 7 | |
| Common Mode Transient Immunity at Output Low | /CML/ | 35 | 50 | kV/µs | TA = 25°C, VDD = 30 V, VF = 0 V, VCM = 2000 V | 7 |
CAD (KiCad official)
- Symbol:
FOD3120 - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
fod3120-etched.step/fod3120-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fod3120.step/fod3120.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (25 pp, sha256
24e5acc0aaacb946, retrieved 2026-10-15, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).