# FM33LG025A

**FUDAN MICRO** · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-48(7x7)

FM33LG025A from FUDAN MICRO, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA15 | bidirectional | GPIO with alternate functions WKUP0 external wake-up, SVS external supply detection and COMP3_OUT comparator output. |
| 2 | PA0 | bidirectional | GPIO with alternate functions COM0 LCD drive, UART4_RX, ADC_IN5 and LUT3_OUT PGL output. |
| 3 | PA1 | bidirectional | GPIO with alternate functions COM1 LCD drive, UART4_TX, ADC_IN12 and LUT2_OUT PGL output. |
| 4 | PA2 | bidirectional | GPIO with alternate functions COM2 LCD drive, UART0_RX and LPUART0_RX. |
| 5 | PA3 | bidirectional | GPIO with alternate functions COM3 LCD drive, UART0_TX and LPUART0_TX. |
| 6 | PA4 | bidirectional | GPIO with alternate functions COM4/SEG28 LCD drive, GPT1_CH3 timer channel and COMP2_INN1 comparator input. |
| 7 | PA5 | bidirectional | GPIO with alternate functions COM5/SEG29 LCD drive, GPT1_CH4 timer channel and COMP2_INN2 comparator input. |
| 8 | PA6 | bidirectional | GPIO with alternate functions COM6/SEG30 LCD drive, OPA1_INN2 op-amp input and CAN_RX. |
| 9 | PA7 | bidirectional | GPIO with alternate functions COM7/SEG31 LCD drive, OPA1_INP2 op-amp input and CAN_TX. |
| 10 | PA8 | bidirectional | GPIO with alternate functions SEG0 LCD drive, LPT32_CH1, SPI1_SSN and COMP2_INP1 comparator input. |
| 11 | PA9 | bidirectional | GPIO with alternate functions SEG1 LCD drive, LPT32_CH2, SPI1_SCK and COMP2_INP2 comparator input. |
| 12 | PA11 | bidirectional | GPIO with alternate functions SEG32 LCD drive, I2C SCL and LPUART2_RX. |
| 13 | PA12 | bidirectional | GPIO with alternate functions SEG33 LCD drive, I2C SDA and LPUART2_TX. |
| 14 | PB2 | bidirectional | GPIO with alternate functions WKUP2 wake-up, VCIN1 LCD capacitor pin (capacitor drive mode), UART4_RX and ATIM_CH1N. |
| 15 | PB3 | bidirectional | GPIO with alternate functions VCIN2 LCD capacitor pin (capacitor drive mode), UART4_TX and ATIM_CH2N. |
| 16 | PB4 | bidirectional | GPIO with alternate functions SEG3 LCD drive, ATIM_CH1, LPUART2_RX and COMP3_INN1 comparator input. |
| 17 | PB5 | bidirectional | GPIO with alternate functions SEG4 LCD drive, ATIM_CH2, LPUART2_TX and COMP3_INN2 comparator input. |
| 18 | PB6 | bidirectional | GPIO with alternate functions SEG5 LCD drive, ATIM_CH3 and SPI2_SSN. |
| 19 | PB7 | bidirectional | GPIO with alternate functions SEG6 LCD drive, ATIM_CH4, SPI2_SCK and ANATST factory test channel. |
| 20 | PB8 | bidirectional | GPIO with alternate functions SEG7 LCD drive, SPI0_SSN, ATIM_CH3N and COMP1_INP1 comparator input. |
| 21 | PB9 | bidirectional | GPIO with alternate functions SEG8 LCD drive, COMP1_INP2 comparator input, SPI0_SCK and GPT0_ETR external trigger. |
| 22 | PB10 | bidirectional | GPIO with alternate functions SEG9 LCD drive, OPA1_INN1 op-amp input, SPI0_MISO and GPT0_CH1. |
| 23 | PB11 | bidirectional | GPIO with alternate functions SEG10 LCD drive, OPA1_INP1 op-amp input, SPI MOSI and GPT0_CH2. |
| 24 | PB12 | bidirectional | GPIO with alternate functions WKUP3 wake-up, FOUT1 clock output, ATIM_ETR external trigger and OPA1_OUT1 op-amp output. |
| 25 | PC0 | bidirectional | GPIO with alternate functions VDISP2 LCD external capacitor (capacitor drive mode), COMP3_INP1, LUT0_OUT PGL output and GPT1_CH1. |
| 26 | PC1 | bidirectional | GPIO with alternate functions VDISP3 LCD external capacitor (capacitor drive mode), COMP3_INP2, LUT1_OUT PGL output and GPT1_CH2. |
| 27 | PC2 | bidirectional | GPIO with alternate functions XTHIN high-frequency crystal input, UART1_RX and LPUART1_RX. |
| 28 | PC3 | bidirectional | GPIO with alternate functions XTHOUT high-frequency crystal output, UART1_TX and LPUART1_TX. |
| 29 | PC4 | bidirectional | GPIO with alternate functions SEG13 LCD drive, OPA1_OUT2 op-amp output, COMP1_OUT comparator output and UART5_RX. |
| 30 | PC5 | bidirectional | GPIO with alternate functions SEG14 LCD drive, DAC_OUT, COMP2_OUT comparator output and UART5_TX. |
| 31 | PC6 | bidirectional | GPIO with alternate functions WKUP4 wake-up, SEG15 LCD drive, GPT1_ETR external trigger and COMP1_INN2 comparator input. |
| 32 | PC7 | bidirectional | GPIO with alternate functions SEG16 LCD drive, SPI2_SSN and ADC_IN6. |
| 33 | PC8 | bidirectional | GPIO with alternate functions SEG17 LCD drive, SPI2_SCK and ADC_IN13. |
| 34 | PC9 | bidirectional | GPIO with alternate functions SEG18 LCD drive, SPI2_MISO and ADC_IN14. |
| 35 | PC10 | bidirectional | GPIO with alternate functions WKUP5 wake-up, SEG19 LCD drive, SPI2_MOSI and ADC_IN15. |
| 36 | XT32KO | output | 32768Hz crystal oscillator output pin. |
| 37 | XT32KI | input | 32768Hz crystal oscillator input pin. |
| 38 | VDD15 | power_out | LDO output; connect a 100nF capacitor to ground. |
| 39 | VSS | power_in | Ground (VSSA). |
| 40 | VDD | power_in | Power supply (VDDA), 1.65 to 5.5V operating range. |
| 41 | VREFP | passive | Reference voltage pin (ADC reference source). |
| 42 | VBAT | power_in | Backup power supply, 1.5 to 4.2V when power switching is used, otherwise shorted to VDD. |
| 43 | PD11 | bidirectional | GPIO with alternate functions WKUP6 wake-up, FOUT0 clock output, ATIM_BRK1 brake input and ADC_IN0. |
| 44 | PD0 | bidirectional | GPIO with alternate functions SEG22 LCD drive, UART5_RX, GPT2_CH1 and ADC_IN7. |
| 45 | PD1 | bidirectional | GPIO with alternate functions SEG23 LCD drive, UART5_TX, GPT2_CH2 and ADC_IN1. |
| 46 | PD7 | bidirectional | GPIO with alternate functions UART3_RX and SWCLK SWD interface clock. |
| 47 | PD8 | bidirectional | GPIO with alternate functions UART3_TX and SWIO SWD interface data. |
| 48 | NRST | input | Reset pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | FUDAN MICRO |
| Package | LQFP-48(7x7) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 48 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (VDD, VDDA) relative to VSS | VDD-VSS | -0.3 |  | 6.5 | V | includes VDD, VDDA | 61 |
| Pin voltage | VPIN | -0.3 |  | 6.5 | V | VSS-0.3 to 6.5 V | 61 |
| ADC reference voltage | VREFP-VREFN | -0.3 |  | 6.5 | V |  | 61 |
| Voltage difference between all ground pins | /ΔVSS/ |  |  | 50 | mV |  | 61 |
| Operating temperature | TA | -40 |  | 105 | ℃ | AEC-Q100 grade 2 | 61 |
| Storage temperature | TSTG | -55 |  | 150 | ℃ |  | 61 |
| ESD HBM, PC5 (DAC_OUT) | HBM | -2000 |  | 2000 | V | TA=25℃, JEDEC JS-001 | 61 |
| ESD HBM, all other pins | HBM | -4000 |  | 4000 | V | TA=25℃, JEDEC JS-001 | 61 |
| ESD CDM | CDM | -1000 |  | 1000 | V | TA=25℃, JEDEC JS-002 | 61 |
| IO latch-up | LU | -210 |  | 210 | mA | -(0.5VDD) < VI < (1.5VDD), TA=25℃, JESD78E | 61 |
| Max current into VDD (source) | ∑IVDD |  |  | 120 | mA |  | 61 |
| Max current out of VSS (sink) | ∑IVSS |  |  | 100 | mA |  | 61 |
| Total IO sink current | ∑IIO |  |  | 100 | mA | all IO sink | 61 |
| Total IO source current | ∑IIO |  |  | 120 | mA | all IO source | 61 |
| AHB clock frequency | fHCLK | 0 |  | 64 | MHz | TA=-40~105C | 62 |
| APB clock frequency | fPCLK | 0 |  | 64 | MHz | TA=-40~105C | 62 |
| Operating voltage range | VDD | 1.65 |  | 5.5 | V | TA=-40~105C | 62 |
| Backup supply voltage, no power switching | VBAT | 1.5 |  | 5.5 | V | power switching not used, shorted to VDD | 62 |
| Backup supply voltage, power switching | VBAT | 1.5 |  | 4.2 | V | power switching used, VBAT supplied separately | 62 |
| Junction temperature | TJ | -40 |  | 125 | °C |  | 62 |
| Run mode current 8MHz | IDDRUN |  | 1.36 | 1.65 | mA | fAHB=8MHz (RCHF), PLL off, Flash 0 wait, TA=25℃, VDD=5V | 62 |
| Run mode current 8MHz | IDDRUN |  | 1.4 | 1.7 | mA | fAHB=8MHz (RCHF), PLL off, Flash 0 wait, TA=105℃, VDD=5V | 62 |
| Run mode current 24MHz | IDDRUN |  | 3.15 | 3.5 | mA | fAHB=24MHz (RCHF), PLL off, Flash 0 wait, TA=25℃, VDD=5V | 62 |
| Run mode current 24MHz | IDDRUN |  | 3.12 | 3.6 | mA | fAHB=24MHz (RCHF), PLL off, Flash 0 wait, TA=105℃, VDD=5V | 62 |

## CAD (KiCad official)

- Symbol: `FM33LG025A`
- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`
- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `fm33lg025a-etched.step` / `fm33lg025a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fm33lg025a.step` / `fm33lg025a.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [FUDAN MICRO datasheet](docs/fm33lg025a-datasheet.pdf) (100 pp, sha256 `bfd0cc3c1ded70af`, retrieved 2026-10-23, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/fm33lg025a-datasheet.pdf)