component
FM33LC043N
Public Made by Adomby adom
FUDAN MICRO Other Processors and Microcontrollers (MCUs), QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFM33LC043N
FUDAN MICRO · Other Processors and Microcontrollers (MCUs) · QFN-32-EP(5x5)
FM33LC043N from FUDAN MICRO, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PD8 | bidirectional | GPIO that doubles as SWIO, the SWD interface data line. |
| 2 | NRST | input | Global reset pin; holding it low for more than 8 ms resets the chip, and 5 kΩ pull-up is specified. |
| 3 | PA13 | bidirectional | GPIO with UART0_RX, LPUART0_RX and ADC_IN6 functions. |
| 4 | PA14 | bidirectional | GPIO with UART0_TX, LPUART0_TX and ADC_IN7 functions. |
| 5 | PA15 | bidirectional | GPIO with WKUP0 wake-up, SVS external supply detection and ADC_IN10 functions. |
| 6 | PA8 | bidirectional | GPIO with SEG0 LCD segment, LPT32_CH1 and COMP2_INP1 comparator input functions. |
| 7 | PA9 | bidirectional | GPIO with SEG1 LCD segment, LPT32_CH2 and COMP2_INP2 comparator input functions. |
| 8 | PA10 | bidirectional | GPIO with WKUP1 wake-up, SEG2 LCD segment, LPT32_ETR and COMP1_INN1 comparator input functions. |
| 9 | PB2 | bidirectional | GPIO with WKUP2 wake-up, UART4_RX and ATIM_CH1N functions. |
| 10 | PB3 | bidirectional | GPIO with UART4_TX and ATIM_CH2N functions. |
| 11 | PB8 | bidirectional | GPIO with SEG7 LCD segment, SPI1_SSN and ATIM_CH3N functions. |
| 12 | PB9 | bidirectional | GPIO with SEG8 LCD segment, ANATST analog test, SPI1_SCK and GPT0_ETR functions. |
| 13 | PB10 | bidirectional | GPIO with SEG9 LCD segment, OPA1_INN1 input, SPI1_MISO and GPT0_CH1 functions. |
| 14 | PB11 | bidirectional | GPIO with SEG10 LCD segment, OPA1_INP1 input, SPI1_MOSI and GPT0_CH2 functions. |
| 15 | PB13 | bidirectional | GPIO with SEG11 LCD segment, OPA2_INN1 input, UART1_RX and LPUART1_RX functions. |
| 16 | PB14 | bidirectional | GPIO with SEG12 LCD segment, OPA2_INP1 input, UART1_TX and LPUART1_TX functions. |
| 17 | PC2 | bidirectional | GPIO with XTHIN high-frequency crystal input, UART1_RX and LPUART1_RX functions. |
| 18 | PC3 | bidirectional | GPIO with XTHOUT high-frequency crystal output, UART1_TX and LPUART1_TX functions. |
| 19 | PC4 | bidirectional | GPIO with SEG13 LCD segment, OPA1_OUT output and UART5_RX functions. |
| 20 | PC5 | bidirectional | GPIO with SEG14 LCD segment, OPA2_OUT output and UART5_TX functions. |
| 21 | PC8 | bidirectional | GPIO with SEG17 LCD segment, SPI2_SCK and ADC_IN9 functions. |
| 22 | PC9 | bidirectional | GPIO with SEG18 LCD segment, SPI2_MISO and ADC_IN0 functions. |
| 23 | PC10 | bidirectional | GPIO with WKUP5 wake-up, SEG19 LCD segment, SPI2_MOSI and ADC_IN1 functions. |
| 24 | PD9 | bidirectional | GPIO that doubles as XT32KO, the 32768 Hz crystal output. |
| 25 | PD10 | bidirectional | GPIO that doubles as XT32KI, the 32768 Hz crystal input. |
| 26 | VDD15 | power_out | LDO output; connect a 100 nF capacitor to ground (0.1~1 µF regulator capacitor per power section). |
| 27 | VSS | power_in | Ground. |
| 28 | VDD | power_in | Main power supply, 1.8~5.5 V without USB use (FM33LC0xxN). |
| 29 | PD11 | bidirectional | GPIO with WKUP6 wake-up, FOUT0 clock output, ATIM_BRK1 brake input and ADC_IN2 functions. |
| 30 | PD0 | bidirectional | GPIO with SEG22 LCD segment, UART5_RX and ADC_IN3 functions. |
| 31 | PD1 | bidirectional | GPIO with SEG23 LCD segment, UART5_TX and ADC_IN4 functions. |
| 32 | PD7 | bidirectional | GPIO that doubles as SWCLK, the SWD interface clock. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | FUDAN MICRO |
| Package | QFN-32-EP(5x5) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VDD-VSS (incl. VDDA) | VDD-VSS | -0.3 | 6.5 | V | 63 | ||
| Pin voltage | VPIN | -0.3 | 6.5 | V | min is VSS-0.3 | 63 | |
| VDD to VDDA difference | /ΔVDD/ | 50 | mV | 63 | |||
| Difference between all ground pins | /ΔVSS/ | 50 | mV | 63 | |||
| Operating temperature | TA | -40 | 85 | °C | 63 | ||
| Storage temperature | TSTG | -55 | 150 | °C | 63 | ||
| ESD HBM (pins other than PA11, PA12, PB12) | HBM | -8000 | 8000 | V | TA=25℃, JEDEC JS-001 | 63 | |
| ESD HBM (PA11, PA12, PB12) | HBM | -5000 | 5000 | V | TA=25℃, JEDEC JS-001 | 63 | |
| ESD CDM | CDM | -1000 | 1000 | V | TA=25℃, JEDEC JS-002 | 63 | |
| IO latchup trigger current | Itrigger | -125 | 125 | mA | -(0.5VDD)<VI<(1.5VDD), TA=25℃, JESD78E | 63 | |
| IO latchup supply voltage | Vsupply | 8.25 | V | TA=25℃, JESD78E | 63 | ||
| Max current into VDD (source) | ∑IVDD | 90 | mA | 63 | |||
| Max current out of VSS (sink) | ∑IVSS | 70 | mA | 63 | |||
| Total IO sink current | ∑IIO | 90 | mA | all IO sink | 63 | ||
| Total IO source current | ∑IIO | 70 | mA | all IO source | 63 | ||
| AHB clock frequency | fHCLK | 0 | 64 | Mhz | 64 | ||
| APB clock frequency | fPCLK | 0 | 64 | Mhz | 64 | ||
| Operating voltage (no USB), BOR enabled | VDD | 1.8 | 5.5 | V | 不使用 USB 功能, BOR 使能 | 64 | |
| Operating voltage (no USB), BOR off | VDD | 1.35 | 5.5 | V | 不使用 USB 功能, BOR 关闭 | 64 | |
| Analog supply voltage (no USB) | VDDA | 1.8 | 5.5 | V | 必须满足 VDDA=VDD | 64 | |
| Junction temperature | TJ | -40 | 105 | °C | TA=-40~+85C | 64 |
CAD (KiCad official)
- Symbol:
FM33LC043N - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
fm33lc043n-etched.step/fm33lc043n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fm33lc043n.step/fm33lc043n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: FUDAN MICRO datasheet (707 pp, sha256
6d623d96ef650faf, retrieved 2026-10-22, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).