component

FM33LC026N

Public Made by Adom

by adom

FUDAN MICRO Other Processors and Microcontrollers (MCUs), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersfm33lc026nfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3d ago
viewers fm33lc026n: viewers · Ray 3d ago
fm33lc026n-etched.glb Publish 0.1.0 · Ray 3d ago
fm33lc026n-etched.step fm33lc026n: factory component page (tier=lcsc) · Ray 3d ago
fm33lc026n-hero.glb fm33lc026n: hero GLB from the etched model (keeps the MPN mark) · Ray 3d ago
fm33lc026n-hero.overlay.json Publish 0.1.0 · Ray 3d ago
fm33lc026n.glb Publish 0.1.0 · Ray 3d ago
fm33lc026n.kicad_mod Publish 0.1.0 · Ray 3d ago
fm33lc026n.kicad_sym Publish 0.1.0 · Ray 3d ago
fm33lc026n.lbr Publish 0.1.0 · Ray 3d ago
fm33lc026n.step Publish 0.1.0 · Ray 3d ago
package.json Publish 0.1.0 · Ray 3d ago
page.json Set visibility: public · Ray 3d ago
README.md Publish 0.1.0 · Ray 3d ago

FM33LC026N

FUDAN MICRO · Other Processors and Microcontrollers (MCUs) · LQFP-64(10x10)

FM33LC026N from FUDAN MICRO, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NRST input Global reset pin, active low; held low for more than 8 ms it triggers a system reset (debug logic not reset).
2 PA13 bidirectional GPIO with alternate functions UART0_RX, LPUART0_RX and ADC_IN6.
3 PA14 bidirectional GPIO with alternate functions UART0_TX, LPUART0_TX and ADC_IN7.
4 PA15 bidirectional GPIO with WKUP0 wake-up, SVS external supply detection and ADC_IN10.
5 PA0 bidirectional GPIO with LCD COM0 and UART4_RX.
6 PA1 bidirectional GPIO with LCD COM1 and UART4_TX.
7 PA2 bidirectional GPIO with LCD COM2, UART0_RX and LPUART0_RX.
8 PA3 bidirectional GPIO with LCD COM3, UART0_TX and LPUART0_TX.
9 PA4 bidirectional GPIO with LCD COM4/SEG28, GPT1_CH3 and COMP2_INN1 comparator input.
10 PA5 bidirectional GPIO with LCD COM5/SEG29, GPT1_CH4 and COMP2_INN2 comparator input.
11 PA6 bidirectional GPIO with LCD COM6/SEG30 and OPA1_INN2 op-amp input.
12 PA7 bidirectional GPIO with LCD COM7/SEG31 and OPA1_INP2 op-amp input.
13 PA8 bidirectional GPIO with LCD SEG0, LPT32_CH1 and COMP2_INP1 comparator input.
14 PA9 bidirectional GPIO with LCD SEG1, LPT32_CH2 and COMP2_INP2 comparator input.
15 PA10 bidirectional GPIO with WKUP1, LCD SEG2, LPT32_ETR and COMP1_INN1 comparator input.
16 PA11 bidirectional True open-drain GPIO with I2C SCL clock; needs external pull-up, 20 mA sink capability.
17 PA12 bidirectional True open-drain GPIO with I2C SDA data; needs external pull-up, 20 mA sink capability.
18 PB0 bidirectional GPIO with ADC_EXSYNC ADC external enable.
19 PB1 bidirectional GPIO with ADC_EXSAMP ADC external sampling control.
20 PB2 bidirectional GPIO with WKUP2, UART4_RX and ATIM_CH1N.
21 PB3 bidirectional GPIO with UART4_TX and ATIM_CH2N (table text labels it external wake-up pin).
22 PB4 bidirectional GPIO with LCD SEG3 and ATIM_CH1.
23 PB5 bidirectional GPIO with LCD SEG4 and ATIM_CH2.
24 PB6 bidirectional GPIO with LCD SEG5 and ATIM_CH3.
25 PB7 bidirectional GPIO with LCD SEG6 and ATIM_CH4.
26 PB8 bidirectional GPIO with LCD SEG7, SPI1_SSN and ATIM_CH3N.
27 PB9 bidirectional GPIO with LCD SEG8, ANATST analog test, SPI1_SCK and GPT0_ETR.
28 PB10 bidirectional GPIO with LCD SEG9, OPA1_INN1, SPI1_MISO and GPT0_CH1.
29 PB11 bidirectional GPIO with LCD SEG10, OPA1_INP1, SPI1_MOSI and GPT0_CH2.
30 PB12 bidirectional GPIO (5V tolerant) with WKUP3, FOUT1 clock output and ATIM_ETR.
31 PB13 bidirectional GPIO with LCD SEG11, OPA2_INN1, UART1_RX and LPUART1_RX.
32 PB14 bidirectional GPIO with LCD SEG12, OPA2_INP1, UART1_TX and LPUART1_TX.
33 VSS power_in Ground.
34 VDD power_in Main power supply.
35 PC0 bidirectional GPIO with OPA2_INN2 and GPT1_CH1.
36 PC1 bidirectional GPIO with OPA2_INP2 and GPT1_CH2.
37 PC2 bidirectional GPIO with XTHIN high-frequency crystal input, UART1_RX and LPUART1_RX.
38 PC3 bidirectional GPIO with XTHOUT high-frequency crystal output, UART1_TX and LPUART1_TX.
39 PC4 bidirectional GPIO with LCD SEG13, OPA1_OUT output, and UART5_RX.
40 PC5 bidirectional GPIO with LCD SEG14, OPA2_OUT output, and UART5_TX.
41 PC6 bidirectional GPIO with WKUP4, LCD SEG15, GPT1_ETR and ADC_IN11.
42 PC7 bidirectional GPIO with LCD SEG16, SPI2_SSN and ADC_IN8.
43 PC8 bidirectional GPIO with LCD SEG17, SPI2_SCK and ADC_IN9.
44 PC9 bidirectional GPIO with LCD SEG18, SPI2_MISO and ADC_IN0.
45 PC10 bidirectional GPIO with WKUP5, LCD SEG19, SPI2_MOSI and ADC_IN1.
46 PC11 bidirectional GPIO with LCD SEG20, U7816CLK 7816 interface clock and GPT0_CH3.
47 PC12 bidirectional GPIO with LCD SEG21, U7816IO 7816 interface data and GPT0_CH4.
48 PD9 bidirectional GPIO with XT32KO 32768Hz crystal output.
49 PD10 bidirectional GPIO with XT32KI 32768Hz crystal input.
50 VDD15 power_out LDO output; connect a 100nF capacitor to ground.
51 VSS power_in Ground.
52 VDD power_in Main power supply.
53 VSSA power_in Analog ground.
54 VDDA power_in Analog power supply, must equal VDD, 1.8 to 5.5 V without USB.
55 PD11 bidirectional GPIO with WKUP6, FOUT0 clock output, ATIM_BRK1 and ADC_IN2.
56 PD0 bidirectional GPIO with LCD SEG22, UART5_RX and ADC_IN3.
57 PD1 bidirectional GPIO with LCD SEG23, UART5_TX and ADC_IN4.
58 PD2 bidirectional GPIO with LCD SEG24, SPI1_SSN and ADC_IN5.
59 PD3 bidirectional GPIO with LCD SEG25 and SPI1_SCK.
60 PD4 bidirectional GPIO with LCD SEG26, SPI1_MISO and COMP1_INP1 comparator input.
61 PD5 bidirectional GPIO with LCD SEG27, SPI1_MOSI and COMP1_INP2 comparator input.
62 PD6 bidirectional GPIO with WKUP7, ANATST analog test and ATIM_BRK2.
63 PD7 bidirectional GPIO with SWCLK SWD interface clock.
64 PD8 bidirectional GPIO with SWIO SWD interface data.

Key specifications

Parameter Value
Manufacturer FUDAN MICRO
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (VDD, VDDA) relative to VSS VDD-VSS -0.3 6.5 V includes VDD, VDDA 57
Pin voltage VPIN -0.3 6.5 V min is VSS-0.3 57
VDD to VDDA voltage difference /ΔVDD/ 50 mV 57
Voltage difference between all ground pins /ΔVSS/ 50 mV 57
Operating temperature TA -40 85 °C 57
Storage temperature TSTG -55 150 °C 57
ESD HBM, pins other than PA11, PA12, PB12 HBM -8000 8000 V TA=25℃, JEDEC JS-001 57
ESD HBM, PA11, PA12, PB12 HBM -5000 5000 V TA=25℃, JEDEC JS-001 57
ESD CDM CDM -1000 1000 V TA=25℃, JEDEC JS-002 57
IO latch-up trigger current Itrigger -125 125 mA -(0.5VDD) < VI < (1.5VDD), TA=25℃, JESD78E 57
IO latch-up supply voltage Vsupply 8.25 V -(0.5VDD) < VI < (1.5VDD), TA=25℃, JESD78E 57
Max current into VDD (source) ΣIVDD 90 mA 57
Max current out of VSS (sink) ΣIVSS 70 mA 57
Total IO sink current ΣIIO 90 mA all IO sink 57
Total IO source current ΣIIO 70 mA all IO source 57
AHB clock frequency fHCLK 0 64 Mhz 58
APB clock frequency fPCLK 0 64 Mhz 58
Operating voltage range (no USB), BOR enabled VDD 1.8 5.5 V BOR 使能 (BOR enabled), not using USB 58
Operating voltage range (no USB), BOR disabled VDD 1.35 5.5 V BOR 关闭 (BOR disabled), not using USB 58
Analog circuit operating voltage (no USB) VDDA 1.8 5.5 V must satisfy VDDA=VDD 58
Junction temperature TJ -40 105 °C TA=-40~+85C 58

CAD (KiCad official)

  • Symbol: FM33LC026N
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: fm33lc026n-etched.step / fm33lc026n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fm33lc026n.step / fm33lc026n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: FUDAN MICRO datasheet (702 pp, sha256 82de2f50958060d7, retrieved 2026-10-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF