component
FM25640B-GTR
Public Made by Adomby adom
Infineon Cypress Semicon FRAM, SOIC-8. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
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FM25640B-GTR
Infineon Cypress Semicon · FRAM · SOIC-8
FM25640B-GTR from Infineon Cypress Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Active LOW chip select input that activates the device; when HIGH, device enters low-power standby mode, ignores inputs, and tristates output; falling edge required before each opcode. |
| 2 | SCK | input | Serial clock input from SPI master synchronized to all I/O activity; inputs latched on rising edge, outputs driven on falling edge; frequency range 0-20 MHz. |
| 3 | SI | input | Serial input (MOSI) for all data input to device; sampled on rising edge of SCK; must always be driven to valid logic level to meet IDD specifications. |
| 4 | VSS | power_in | Ground reference for the device; must be connected to system ground. |
| 5 | VDD | power_in | Positive power supply input; operating voltage range 4.5 V to 5.5 V. |
| 6 | SO | output | Serial output (MISO) data pin driven during read operations; remains tristated at all other times including when HOLD is LOW; data transitions on falling edge of serial clock. |
| 7 | WP | input | Active LOW write protect input; when WPEN is set to 1, prevents write operation to Status Register; must be tied to VDD if not used. |
| 8 | HOLD | input | HOLD input used when host CPU must interrupt a memory operation; when LOW with SCK LOW, current operation is suspended; all transitions must occur while SCK is LOW; must be tied to VDD if not used. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Cypress Semicon |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
FM25640B-GTR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
fm25640b-gtr-etched.step/fm25640b-gtr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fm25640b-gtr.step/fm25640b-gtr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Cypress Semicon datasheet (22 pp, sha256
530c43c42a9f291f, retrieved 2026-10-22, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# FM25640B-GTR
**Infineon Cypress Semicon** · FRAM · SOIC-8
FM25640B-GTR from Infineon Cypress Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Active LOW chip select input that activates the device; when HIGH, device enters low-power standby mode, ignores inputs, and tristates output; falling edge required before each opcode. |
| 2 | SCK | input | Serial clock input from SPI master synchronized to all I/O activity; inputs latched on rising edge, outputs driven on falling edge; frequency range 0-20 MHz. |
| 3 | SI | input | Serial input (MOSI) for all data input to device; sampled on rising edge of SCK; must always be driven to valid logic level to meet IDD specifications. |
| 4 | VSS | power_in | Ground reference for the device; must be connected to system ground. |
| 5 | VDD | power_in | Positive power supply input; operating voltage range 4.5 V to 5.5 V. |
| 6 | SO | output | Serial output (MISO) data pin driven during read operations; remains tristated at all other times including when HOLD is LOW; data transitions on falling edge of serial clock. |
| 7 | WP | input | Active LOW write protect input; when WPEN is set to 1, prevents write operation to Status Register; must be tied to VDD if not used. |
| 8 | HOLD | input | HOLD input used when host CPU must interrupt a memory operation; when LOW with SCK LOW, current operation is suspended; all transitions must occur while SCK is LOW; must be tied to VDD if not used. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Cypress Semicon |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `FM25640B-GTR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `fm25640b-gtr-etched.step` / `fm25640b-gtr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fm25640b-gtr.step` / `fm25640b-gtr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Infineon Cypress Semicon datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8615280030759075840) (22 pp, sha256 `530c43c42a9f291f`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/fm25640b-gtr-datasheet.pdf)