component

FM24C128D-SO-T-G-AX

Public Made by Adom

by adom

FUDAN MICRO EEPROM, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentmemoryfm24c128d-so-t-g-ax
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

FM24C128D-SO-T-G-AX

FUDAN MICRO · EEPROM · SOP-8

FM24C128D-SO-T-G-AX from FUDAN MICRO, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected Not connected. Leave floating or optionally tie to GND. Configurable Device Address (CDA) is stored in NVM, so no external A0/A1/A2 slave-address pins are needed.
2 NC unconnected Not connected. Leave floating or optionally tie to GND.
3 NC unconnected Not connected. Leave floating or optionally tie to GND.
4 GND power_in Ground / VSS reference for the device. 0 V.
5 SDA bidirectional Serial data input/output for the 2-wire I2C bus. Open-drain output; requires an external pull-up resistor to VCC (typ. 1.3 kΩ per AC test conditions). Bi-directional data transfer up to 1 MHz (2.5-5.5 V) or 400 kHz (1.6 V).
6 SCL input Serial clock input for the 2-wire I2C bus. Positive-edge clocks data into the EEPROM; negative-edge clocks data out. Requires an external pull-up resistor.
7 WP input Write Protect. Tie to GND for normal read/write operation; tie to VCC to inhibit all writes to memory (full-memory hardware write protection). If left floating and VCC-plane coupling is <3 pF the pin is internally pulled to GND; for >3 pF coupling FMSH recommends tying WP to GND.
8 VCC power_in Positive supply voltage, 1.6 V to 5.5 V (abs. max 6.25 V). Decouple with a local bypass capacitor to GND close to the pin.

Key specifications

Parameter Value
Manufacturer FUDAN MICRO
Package SOP-8
Category Memory
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • FM24C128D-SO-T-G-AX

CAD (KiCad official)

  • Symbol: FM24C128D-SO-T-G-AX
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: fm24c128d-so-t-g-ax-etched.step / fm24c128d-so-t-g-ax-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fm24c128d-so-t-g-ax.step / fm24c128d-so-t-g-ax.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: FUDAN MICRO datasheet (26 pp, sha256 15eba189bf516918, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF