component
FLD0503-3.3YDFN1X1G
Public Made by Adomby adom
Full Way Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN-4L(1x1). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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FLD0503-3.3YDFN1X1G
Full Way · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-4L(1x1)
FLD0503-3.3YDFN1X1G from Full Way, in a DFN-4L(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Output voltage pin supplying up to 300mA continuous (450mA peak) with ±2% output voltage accuracy over the temperature range. |
| 2 | GND | power_in | Ground reference pin for the regulator. |
| 3 | EN | input | Enable pin, with an enable high level of 0.6 V and an enable low level of 0.2 V. |
| 4 | VIN | power_in | Input voltage pin, rated for up to 6 V operation with an absolute maximum of -0.3 V to +6.5 V. |
| 5 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Full Way |
| Package | DFN-4L(1x1) |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage Accuracy | ΔVOUT | -2 | 2 | % | 3 | ||
| Line Regulation | ΔVLINE | 20 | 50 | mV | VIN = VOUT + 1V to 5.5V | 3 | |
| Load Regulation | ΔVLOAD | 13 | 25 | mV | IOUT = 1mA to 150mA | 3 | |
| Load Regulation | ΔVLOAD | 25 | 40 | mV | IOUT = 1mA to 300mA | 3 | |
| Current Limit | ICL | 360 | 560 | mA | 3 | ||
| Quiescent Current | IQ | 0.5 | 1 | uA | TJ= 25℃ | 3 | |
| Dropout Voltage | VDROP | 130 | mV | IOUT = 100mA, VOUT = 3.3V | 3 | ||
| Dropout Voltage | VDROP | 400 | mV | IOUT = 300mA, VOUT = 3.3V | 3 | ||
| Enable high level | VENHI | 0.6 | V | 3 | |||
| Enable low level | VENLO | 0.2 | V | 3 | |||
| Power-supply rejection ratio | PSRR | 60 | dB | f = 1kHz | 3 | ||
| Thermal Shutdown | TSD | 150 | ℃ | 3 | |||
| Thermal Shutdown Hy | TSDHY | 20 | ℃ | 4 | |||
| VIN (Input voltage) | VIN | -0.3 | 6.5 | V | 2 | ||
| Junction Temperature | 125 | ℃ | 2 | ||||
| Lead Temperature (Soldering) | 300 | ℃ | Soldering, 10 sec. | 2 | |||
| Storage Temperature | -65 | 150 | ℃ | 2 | |||
| Input voltage (maximum operating voltage) | VIN | 6 | V | Stated as the maximum operating voltage limit in the Description | 1 | ||
| Operating temperature range | 0 | 100 | °C | Stated as the operating temperature range in the Description | 1 |
CAD (KiCad official)
- Symbol:
FLD0503-3.3YDFN1X1G - Footprint:
Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm - 3D model: DFN-4L(1x1) (KiCad packages3D, STEP)
- 3D model files:
fld0503-3-3ydfn1x1g-etched.step/fld0503-3-3ydfn1x1g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fld0503-3-3ydfn1x1g.step/fld0503-3-3ydfn1x1g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Full Way datasheet (9 pp, sha256
9fcc42109aca460c, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# FLD0503-3.3YDFN1X1G
**Full Way** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-4L(1x1)
FLD0503-3.3YDFN1X1G from Full Way, in a DFN-4L(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Output voltage pin supplying up to 300mA continuous (450mA peak) with ±2% output voltage accuracy over the temperature range. |
| 2 | GND | power_in | Ground reference pin for the regulator. |
| 3 | EN | input | Enable pin, with an enable high level of 0.6 V and an enable low level of 0.2 V. |
| 4 | VIN | power_in | Input voltage pin, rated for up to 6 V operation with an absolute maximum of -0.3 V to +6.5 V. |
| 5 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Full Way |
| Package | DFN-4L(1x1) |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage Accuracy | ΔVOUT | -2 | | 2 | % | | 3 |
| Line Regulation | ΔVLINE | | 20 | 50 | mV | VIN = VOUT + 1V to 5.5V | 3 |
| Load Regulation | ΔVLOAD | | 13 | 25 | mV | IOUT = 1mA to 150mA | 3 |
| Load Regulation | ΔVLOAD | | 25 | 40 | mV | IOUT = 1mA to 300mA | 3 |
| Current Limit | ICL | 360 | | 560 | mA | | 3 |
| Quiescent Current | IQ | | 0.5 | 1 | uA | TJ= 25℃ | 3 |
| Dropout Voltage | VDROP | | 130 | | mV | IOUT = 100mA, VOUT = 3.3V | 3 |
| Dropout Voltage | VDROP | | 400 | | mV | IOUT = 300mA, VOUT = 3.3V | 3 |
| Enable high level | VENHI | | 0.6 | | V | | 3 |
| Enable low level | VENLO | | 0.2 | | V | | 3 |
| Power-supply rejection ratio | PSRR | | 60 | | dB | f = 1kHz | 3 |
| Thermal Shutdown | TSD | | 150 | | ℃ | | 3 |
| Thermal Shutdown Hy | TSDHY | | 20 | | ℃ | | 4 |
| VIN (Input voltage) | VIN | -0.3 | | 6.5 | V | | 2 |
| Junction Temperature | | | | 125 | ℃ | | 2 |
| Lead Temperature (Soldering) | | | | 300 | ℃ | Soldering, 10 sec. | 2 |
| Storage Temperature | | -65 | | 150 | ℃ | | 2 |
| Input voltage (maximum operating voltage) | VIN | | | 6 | V | Stated as the maximum operating voltage limit in the Description | 1 |
| Operating temperature range | | 0 | | 100 | °C | Stated as the operating temperature range in the Description | 1 |
## CAD (KiCad official)
- Symbol: `FLD0503-3.3YDFN1X1G`
- Footprint: `Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm`
- 3D model: DFN-4L(1x1) (KiCad packages3D, STEP)
- 3D model files: `fld0503-3-3ydfn1x1g-etched.step` / `fld0503-3-3ydfn1x1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `fld0503-3-3ydfn1x1g.step` / `fld0503-3-3ydfn1x1g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Full Way datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590908600892141568) (9 pp, sha256 `9fcc42109aca460c`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/fld0503-3-3ydfn1x1g-datasheet.pdf)