component

FIN1048MTCX

Public Made by Adom

by adom

onsemi LVDS ICs, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsfin1048mtcxfactory-2.0.0extractor-text

Verified FIN1048MTCX

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: FIN1048MTCX · TSSOP-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 8-page datasheet
  • ✓distributor: lcsc C903673, digikey FIN1048MTCXTR-ND, mouser 512-FIN1048MTCX
  • ✓family: TSSOP-16_4.4x5mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-y4_rtmn5/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ fin1048mtcx.kicad_sym✓ fin1048mtcx.kicad_mod✓ fin1048mtcx.step
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Ray Publish 0.1.0 d9f4539 10d ago

FIN1048MTCX

onsemi · LVDS ICs · TSSOP-16

FIN1048MTCX from onsemi, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RIN1- input Inverting LVDS input of receiver 1, with differential input threshold of ±100mV and common-mode range 0.05V to 2.35V.
2 RIN1+ input Non-inverting LVDS input of receiver 1, with differential input threshold of ±100mV and common-mode range 0.05V to 2.35V.
3 RIN2+ input Non-inverting LVDS input of receiver 2, with differential input threshold of ±100mV and common-mode range 0.05V to 2.35V.
4 RIN2- input Inverting LVDS input of receiver 2, with differential input threshold of ±100mV and common-mode range 0.05V to 2.35V.
5 RIN3- input Inverting LVDS input of receiver 3, with differential input threshold of ±100mV and common-mode range 0.05V to 2.35V.
6 RIN3+ input Non-inverting LVDS input of receiver 3, with differential input threshold of ±100mV and common-mode range 0.05V to 2.35V.
7 RIN4+ input Non-inverting LVDS input of receiver 4, with differential input threshold of ±100mV and common-mode range 0.05V to 2.35V.
8 RIN4- input Inverting LVDS input of receiver 4, with differential input threshold of ±100mV and common-mode range 0.05V to 2.35V.
9 EN̅ input Inverting enable pin; outputs are high impedance when it is HIGH, and enabled when LOW or open (with EN HIGH); LVTTL input VIH 2.0V min, VIL 0.8V max.
10 ROUT4 output LVTTL data output of receiver 4, with VOH of at least 2.4V at -8mA and VOL of at most 0.5V at 8mA.
11 ROUT3 output LVTTL data output of receiver 3, with VOH of at least 2.4V at -8mA and VOL of at most 0.5V at 8mA.
12 GND power_in Ground.
13 VCC power_in Power supply, 3.0V to 3.6V recommended operating range (absolute maximum -0.5V to +4.6V).
14 ROUT2 output LVTTL data output of receiver 2, with VOH of at least 2.4V at -8mA and VOL of at most 0.5V at 8mA.
15 ROUT1 output LVTTL data output of receiver 1, with VOH of at least 2.4V at -8mA and VOL of at most 0.5V at 8mA.
16 EN input Enable pin; outputs are enabled when HIGH (with EN̅ LOW or open) and high impedance when LOW or open; LVTTL input VIH 2.0V min, VIL 0.8V max.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-16
Category Interface ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Absolute Maximum: Supply Voltage VCC -0.5 4.6 V 3
Absolute Maximum: DC Input Voltage VIN -0.5 4.6 V 3
Absolute Maximum: DC Input Voltage (output pins) VOUT -0.5 6 V 3
Absolute Maximum: DC Output Current IO 16 mA 3
Absolute Maximum: Storage Temperature Range TSTG -65 150 °C 3
Absolute Maximum: Max Junction Temperature TJ 150 °C 3
Absolute Maximum: Lead Temperature (Soldering) TL 260 °C Soldering, 10 seconds 3
ESD (Human Body Model) 10000 V Human Body Model, printed as ≥ 3
ESD (Machine Model) 450 V Machine Model, printed as ≥ 3
Recommended Operating: Supply Voltage VCC 3 3.6 V 3
Recommended Operating: Magnitude of Differential Voltage /VID/ 100 mV Upper limit printed as VCC 3
Recommended Operating: Common-Mode Input Voltage VIC 0.05 2.35 V 3
Recommended Operating: Input Voltage VIN 0 V Upper limit printed as VCC 3
Recommended Operating: Operating Temperature TA -40 85 °C 3
Differential Input Threshold HIGH VTH 100 mV See Figure 1 and Table 1 3
Differential Input Threshold LOW VTL -100 mV See Figure 1 and Table 1 3
Input Current IIN -20 20 µA VIN = 0V or VCC 3
Power-Off Input Current II(OFF) -20 20 µA VCC = 0V, VIN = 0V or 3.6V 3
Input High Voltage (EN or EN) VIH 2 V 3
Input Low Voltage (EN or EN) VIL 0.8 V 3
Output HIGH Voltage VOH 2.4 V IOH = −8 mA 3
Output LOW Voltage VOL 0.2 V IOH = 100 µA 3
Output LOW Voltage VOL 0.5 V IOL = 8 mA 3
Disabled Output Leakage Current IOZ -20 20 µA EN = 0.8 and EN* = 2V, VOUT = 3.6V or 0V 3
Input Clamp Voltage VIK -1.5 V IIK = −18 mA 3
Disabled Power Supply Current ICCZ 5 mA Receiver Disabled 3
Power Supply Current ICC 15 mA Receiver Enabled, (RIN+ = 1V and RIN− = 1.4V) or (RIN+ = 1.4V and RIN− = 1V) 3
Propagation Delay LOW-to-HIGH tPLH 1 2.5 ns 4
Propagation Delay HIGH-to-LOW tPHL 1 2.5 ns 4
Output Rise Time (20% to 80%) tTLH 0.7 1.2 ns /VID/ = 400 mV, CL = 10 pF 4
Output Fall Time (80% to 20%) tTHL 0.7 1.2 ns RL = 1kΩ 4
Pulse Skew tSK(P) 0.4 ns See Figure 1 and Figure 2 4
Channel-to-Channel Skew tSK(LH), tSK(HL) 0.3 ns 4
Part-to-Part Skew tSK(PP) 1 ns 4
Maximum Operating Frequency fMAX 200 375 MHz RL = 1kΩ, CL = 10 pF, see Figure 1 and Figure 2 4
LVTTL Output Enable Time from Z to HIGH tZH 6 ns 4
LVTTL Output Enable Time from Z to LOW tZL 6 ns RL = 1kΩ, CL = 10 pF 4
LVTTL Output Disable Time from HIGH to Z tHZ 6 ns See Figure 3 4
LVTTL Output Disable Time from LOW to Z tLZ 6 ns 4
Input Capacitance CIN 3.5 pF 3
Output Capacitance COUT 6 pF 3

CAD (KiCad official)

  • Symbol: FIN1048MTCX
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: fin1048mtcx-etched.step / fin1048mtcx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fin1048mtcx.step / fin1048mtcx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (8 pp, sha256 4664d6ec642a3ebd, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF