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FE1.1S-BQFN24BT

TERMINUS · USB HUB Controllers · WQFN-24(4x4)

FE1.1S-BQFN24BT from TERMINUS, in a WQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	OVCJ	input	Active-low Over Current Sense input from an external current monitor, used for Global Over-Current Protection (Schmitt-trigger, 5V-tolerant).
2	TESTJ/EESDA	bidirectional	Active-low open-drain 3.3V I/O with internal pull-up (4mA sink); tying it low at power-on-reset enters factory test mode, otherwise leave it unconnected or connect it to external EEPROM SDA.
3	XOUT	output	12MHz crystal oscillator output; the crystal must be 12MHz ±50ppm, 16pF to 20pF load capacitance, and 50Ω maximum ESR.
4	XIN	input	12MHz crystal oscillator input, or external 12MHz clock input, with the same crystal requirements as XOUT.
5	DM4	bidirectional	USB D- signal of the 4th downstream facing port, supporting High-, Full- and Low-Speed operation.
6	DP4	bidirectional	USB D+ signal of the 4th downstream facing port, supporting High-, Full- and Low-Speed operation.
7	DM3	bidirectional	USB D- signal of the 3rd downstream facing port, supporting High-, Full- and Low-Speed operation.
8	DP3	bidirectional	USB D+ signal of the 3rd downstream facing port, supporting High-, Full- and Low-Speed operation.
9	DM2	bidirectional	USB D- signal of the 2nd downstream facing port, supporting High-, Full- and Low-Speed operation.
10	DP2	bidirectional	USB D+ signal of the 2nd downstream facing port, supporting High-, Full- and Low-Speed operation.
11	DM1	bidirectional	USB D- signal of the 1st downstream facing port, supporting High-, Full- and Low-Speed operation.
12	DP1	bidirectional	USB D+ signal of the 1st downstream facing port, supporting High-, Full- and Low-Speed operation.
13	REXT	passive	External bias resistor pin; a 2.7kΩ (±1%) resistor must be connected to VSS to provide the internal bias reference.
14	DMU	bidirectional	USB D- signal of the upstream facing port, supporting High- and Full-Speed operation.
15	DPU	bidirectional	USB D+ signal of the upstream facing port, supporting High- and Full-Speed operation.
16	XRSTJ	input	Active-low external reset; normally pulled up to 3.3V, and a minimum 10µs low pulse resets the chip beyond power-up.
17	VBUSM	input	Upstream VBUS monitor; high indicates the host is powered and the hub operates normally, low forces the hub into power-down state.
18	BUSJ	input	Power source sense; high means the hub is self-powered and can support high-power downstream devices, low means bus-powered with 100mA presumed per downstream port.
19	VDD5	power_in	5V power input for the integrated 5V-to-3.3V regulator, specified at 4.5V to 5.5V; leave as No-Connection if an external 3.3V source is used.
20	VD33F	power_out	3.3V filter capacitor connection for the embedded 5V-to-3.3V regulator, or a 3.3V input from an external source (specified at 3.0V to 3.6V).
21	DRV/CHRGEN	bidirectional	During power-on-reset, high enables the battery charging (Charging Hub) function; otherwise it drives the LED control with 24mA drive strength.
22	LED1/EESCL	bidirectional	Port 1 and Port 3 connected indicator LED control (joint indicator for all ports when LED2 is high at power-on-reset), also the external EEPROM clock (SCL), 8mA drive.
23	LED2/JLEDEN	bidirectional	Port 2 and Port 4 connected indicator LED control; tying it to 3.3V during power-on-reset enables the joint port indicator, 8mA drive.
24	PWRJ	output	Active-low open-drain power enable for downstream power switching in ganged mode, used to limit in-rush current or respond to over-current (4mA sink).
25	VSS	power_in	Ground; pin 25 is the underside exposed pad of the WQFN package and must be connected to ground.

Key specifications

Parameter	Value
Manufacturer	TERMINUS
Package	WQFN-24(4x4)
Category	Interface
Pins	25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Storage Temperature	TS	-55		150	°C		16
Power Supply Voltage	VDD5	-0.5		6	V		16
Power Supply Voltage	VD33	-0.5		4	V		16
ESD Human Body Mode		-2000		2000	V		16
ESD Machine Mode		-200		200	V		16
ESD Charged Device Mode		-500		500	V		16
Latch Up		-200		200	mA		16
Operating Temperature	TA	0		70	°C	Recommended operating range; min/max column placement inferred from two printed values	16
Operating Voltage	VDD5	4.5	5	5.5	V		16
Operating Voltage	VD33	3	3.3	3.6	V		16
LOW level voltage of digital input	VIL	-0.3		0.8	V		16
HIGH level voltage of digital input	VIH	2		5.5	V		16
Threshold voltage of digital input	VTH	1.45	1.58	1.74	V		16
Low-to-High level of Schmitt-trigger input	VT+	1.44	1.5	1.56	V		16
High-to-Low level of Schmitt-trigger input	VT-	0.89	0.94	0.99	V		16
LOW level voltage of digital output	VOL			0.4	V	Single printed value; column placed as maximum by reading of the row	16
HIGH level voltage of digital output	VOH	2.4			V	Single printed value; column placed as minimum by reading of the row	16
XIN input capacitance	Cin		32		ρF	Single printed value; printed unit is 'ρF' as in source	16
Internal Pull-Up Resistor Range	RPU	39	65	116	KΩ		16
Operating temperature	TA	-40	25	85	°C	Extended range; product BQFN24BT final tested at room temperature, 85°C and -40°C	17
Minimum reset pulse on XRSTJ		10			µs	XRSTJ driven low for chip reset after power-up	9
REXT external bias resistor tolerance	REXT	-1		1	%	External 2.7KΩ resistor from REXT to VSS	8
Crystal frequency accuracy		-50		50	ppm	12MHz crystal requirement (external crystal)	10
Crystal load capacitance		16		20	pF	12MHz crystal requirement (external crystal)	10
Crystal equivalent series resistance				50	Ω	12MHz crystal requirement (external crystal), maximum	10
REXT external bias resistor	REXT		2.7		KΩ	Nominal value; external resistor to VSS	8
Integrated upstream pull-up resistor			1.5		KΩ	Integrated upstream pull-up, nominal per Features	1
Integrated downstream pull-down resistor			15		KΩ	Integrated downstream pull-down, nominal per Features	1

CAD (KiCad official)

Symbol: FE1.1S-BQFN24BT
Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
3D model: WQFN-24(4x4) (KiCad packages3D, STEP)
3D model files: fe1-1s-bqfn24bt-etched.step / fe1-1s-bqfn24bt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fe1-1s-bqfn24bt.step / fe1-1s-bqfn24bt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: TERMINUS datasheet (22 pp, sha256 5677873747ef908e, retrieved 2026-10-17, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF