component

FDS9435A

Public Made by Adom

by adom

onsemi MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorsfds9435afactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

FDS9435A

onsemi · MOSFETs · SO-8

FDS9435A from onsemi, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the 30 V P-channel PowerTrench MOSFET, sharing the device's VDSS of -30 V and VGSS of ±25 V ratings.
2 S passive Source terminal of the 30 V P-channel PowerTrench MOSFET, sharing the device's VDSS of -30 V and VGSS of ±25 V ratings.
3 S passive Source terminal of the 30 V P-channel PowerTrench MOSFET, sharing the device's VDSS of -30 V and VGSS of ±25 V ratings.
4 G input Gate terminal; the device is a rugged gate version rated for gate-source voltage of ±25 V (VGSS) and gate drive voltages of 4.5 V to 25 V per the general description.
5 D passive Drain terminal; the drain pins form the solder mounting surface used as the case thermal reference for RθJC and RθJA (Note 1).
6 D passive Drain terminal; the drain pins form the solder mounting surface used as the case thermal reference for RθJC and RθJA (Note 1).
7 D passive Drain terminal; the drain pins form the solder mounting surface used as the case thermal reference for RθJC and RθJA (Note 1).
8 D passive Drain terminal; the drain pins form the solder mounting surface used as the case thermal reference for RθJC and RθJA (Note 1).

Key specifications

Parameter Value
Manufacturer onsemi
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain–Source Breakdown Voltage BVDSS -30 V VGS = 0 V, ID = –250 μA 2
Zero Gate Voltage Drain Current IDSS -1 μA VDS = –24 V, VGS = 0 V 2
Gate–Body Leakage, Forward IGSSF 100 nA VGS = 25 V, VDS = 0 V 2
Gate–Body Leakage, Reverse IGSSR -100 nA VGS = –25 V VDS = 0 V 2
Gate Threshold Voltage VGS(th) -1 -1.7 -3 V VDS = VGS, ID = –250 μA 2
Static Drain–Source On–Resistance RDS(on) 42 50 mΩ VGS = –10 V, ID = –5.3 A 2
Static Drain–Source On–Resistance RDS(on) 65 80 mΩ VGS = –4.5 V, ID = –4 A 2
Static Drain–Source On–Resistance RDS(on) 57 77 mΩ VGS= –10 V, ID = –5.3 A, TJ=125°C 2
On–State Drain Current ID(on) -25 A VGS = –10 V, VDS = –5 V 2
Maximum Continuous Drain–Source Diode Forward Current IS -2.1 A 2
Drain–Source Diode Forward Voltage VSD -0.8 -1.2 V VGS = 0 V, IS = –2.1 A (Note 2) 2
Turn–On Delay Time td(on) 7 14 ns VDD = –15 V, ID = –1 A, VGS = –10 V, RGEN = 6 Ω 2
Turn–On Rise Time tr 13 24 ns VDD = –15 V, ID = –1 A, VGS = –10 V, RGEN = 6 Ω 2
Turn–Off Delay Time td(off) 14 25 ns VDD = –15 V, ID = –1 A, VGS = –10 V, RGEN = 6 Ω 2
Turn–Off Fall Time tf 9 17 ns VDD = –15 V, ID = –1 A, VGS = –10 V, RGEN = 6 Ω 2
Total Gate Charge Qg 10 14 nC VDS = –15 V, ID = –4 A, VGS = –10 V 2
Breakdown Voltage Temperature Coefficient ΔBVDSS/ΔTJ -23 mV/°C ID = –250 μA, Referenced to 25°C 2
Gate Threshold Voltage Temperature Coefficient ΔVGS(th)/ΔTJ 4.5 mV/°C ID = –250 μA, Referenced to 25°C 2
Forward Transconductance gFS 10 S VDS = –5 V, ID = –5.3 A 2
Input Capacitance Ciss 528 pF 2
Output Capacitance Coss 132 pF 2
Reverse Transfer Capacitance Crss 70 pF VDS = –15 V, V GS = 0 V, f = 1.0 MHz 2
Gate–Source Charge Qgs 2.2 nC VDS = –15 V, ID = –4 A, VGS = –10 V 2
Gate–Drain Charge Qgd 2 nC VDS = –15 V, ID = –4 A, VGS = –10 V 2
Drain–Source Voltage VDSS -30 V 1
Gate–Source Voltage VGSS -25 25 V 1
Drain Current – Continuous ID -5.3 A Note 1a 1
Drain Current – Pulsed ID -50 A 1
Power Dissipation for Single Operation PD 2.5 W Note 1a 1
Power Dissipation for Single Operation PD 1.2 W Note 1b 1
Power Dissipation for Single Operation PD 1 W Note 1c 1
Operating and Storage Junction Temperature Range TJ, TSTG -55 175 °C 1
Gate Drive Voltage Rating VGS 4.5 25 V Wide gate drive voltage rating stated in General Description 1
Thermal Resistance, Junction-to-Ambient RθJA 50 °C/W Note 1a 1
Thermal Resistance, Junction-to-Ambient RθJA 105 °C/W Note 1b 2
Thermal Resistance, Junction-to-Ambient RθJA 125 °C/W Note 1c 1
Thermal Resistance, Junction-to-Case RθJC 25 °C/W Note 1 1

CAD (KiCad official)

  • Symbol: FDS9435A
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: fds9435a-etched.step / fds9435a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fds9435a.step / fds9435a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (5 pp, sha256 003cc13e4743d4af, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF