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Ray fds8840nz-vb: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 64a9d87 1mo ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "fds8840nz-vb",
  "title": "FDS8840NZ-VB",
  "brief": "VBsemi Elec MOSFETs, SO-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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    "transistors-thyristors",
    "fds8840nz-vb"
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  "component": {
    "mpn": "FDS8840NZ-VB",
    "manufacturer": "VBsemi Elec",
    "package": "SO-8",
    "pin_count": 8,
    "category": "Transistors/Thyristors",
    "subcategory": "MOSFETs",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603004138855026688",
    "parts": {
      "symbol": "fds8840nz-vb.kicad_sym",
      "footprint": "fds8840nz-vb.kicad_mod",
      "model_3d": "fds8840nz-vb-etched.glb",
      "model_3d_plain": "fds8840nz-vb.glb",
      "model_3d_step": "fds8840nz-vb-etched.step",
      "model_3d_step_plain": "fds8840nz-vb.step",
      "lbr": "fds8840nz-vb.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "S",
        "type": "passive",
        "description": "Source (S) of the N-channel MOSFET. Pins 1, 2, and 3 are internally connected together as the source terminal; carries the load current back to the return path (up to 18 A continuous at TC = 25 °C)."
      },
      {
        "number": "2",
        "name": "S",
        "type": "passive",
        "description": "Source (S) of the N-channel MOSFET. Tied in parallel with pins 1 and 3 to reduce package resistance and improve current handling."
      },
      {
        "number": "3",
        "name": "S",
        "type": "passive",
        "description": "Source (S) of the N-channel MOSFET. Tied in parallel with pins 1 and 2; connect all three source pins together on the PCB."
      },
      {
        "number": "4",
        "name": "G",
        "type": "input",
        "description": "Gate (G) of the N-channel MOSFET. High-impedance control input; VGS(th) = 1.0 to 3.0 V, absolute maximum VGS = ±20 V. Drive with 4.5 V or 10 V for full enhancement."
      },
      {
        "number": "5",
        "name": "D",
        "type": "passive",
        "description": "Drain (D) of the N-channel MOSFET. Pins 5, 6, 7, and 8 are internally connected together as the drain terminal; VDS max = 40 V."
      },
      {
        "number": "6",
        "name": "D",
        "type": "passive",
        "description": "Drain (D) of the N-channel MOSFET. Tied in parallel with pins 5, 7, and 8 to reduce package resistance and improve thermal performance (drain acts as the primary heat-sinking terminal)."
      },
      {
        "number": "7",
        "name": "D",
        "type": "passive",
        "description": "Drain (D) of the N-channel MOSFET. Tied in parallel with pins 5, 6, and 8; connect all four drain pins together on the PCB with a large copper pour for heat spreading."
      },
      {
        "number": "8",
        "name": "D",
        "type": "passive",
        "description": "Drain (D) of the N-channel MOSFET. Tied in parallel with pins 5, 6, and 7 to share the drain current (ID up to 18 A continuous at TC = 25 °C)."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603004138855026688",
        "pages": null,
        "sha256": "da6bb2f6e17cb1ec",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "fds8840nz-vb.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "fds8840nz-vb-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "730aa499c8b8a66aad5d2aa7eaaacb9aac9c0c893f6725dd3d0ab90024f6e5fb",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "VBsemi Elec",
      "Package": "SO-8",
      "Category": "Transistors/Thyristors",
      "Pins": "8"
    }
  },
  "variants": [
    {
      "mpn": "FDS8840NZ-VB",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "fds8840nz-vb"
  ],
  "discovery_pitch": "FDS8840NZ-VB (VBsemi Elec) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "fds8840nz-vb.kicad_sym",
    "fds8840nz-vb.kicad_mod",
    "fds8840nz-vb.glb",
    "fds8840nz-vb.step",
    "fds8840nz-vb.lbr",
    "docs/hero.png",
    "docs/fds8840nz-vb-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T20:34:10.399Z"
}